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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e7-20020a17090658c700b0084c7b0977b6si18690497ejs.852.2023.01.03.10.40.40; Tue, 03 Jan 2023 10:40:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=RVwSE4Pn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238681AbjACSJy (ORCPT + 61 others); Tue, 3 Jan 2023 13:09:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33566 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233586AbjACSJx (ORCPT ); Tue, 3 Jan 2023 13:09:53 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69BFAFCDD for ; Tue, 3 Jan 2023 10:09:52 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C52A26148D for ; Tue, 3 Jan 2023 18:09:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2A666C433EF; Tue, 3 Jan 2023 18:09:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1672769391; bh=wQbkIKESYWax/laoInd6DKOdDsdq7q+29rZEh5GwHOs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=RVwSE4PnNi48ujVwGRD9zBR80eRryE5pMiSgcTocnildT/U1XvKOPEMBkMvyC9EQN EvLqZZpi7s4/rEzx/Ov2A/uGONArsC0Sz80GJpgIu5iNbWeZPM+m3vYIZdqzR0LRit DiUxLGpNtIj/eVtakrNYdxAsjeLShLMZr7fycJBhRlHCa3LTsU95shyo4OuYMozCLp 7XhecoT3Iwf5RT9V3cVf924KtvnbxjbpWuMOQ1CK5Mgn0rde5tMj0f0w06ESGmKDxk qPO3kkxREPsIs5hHnqphlF30HdVU5Aijj55LImaOTosagWAHRCAfiPyjhd+741naOF VRyVxy8yQU0sg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1pCljQ-00GaOg-73; Tue, 03 Jan 2023 18:09:48 +0000 Date: Tue, 03 Jan 2023 18:09:47 +0000 Message-ID: <86tu177ams.wl-maz@kernel.org> From: Marc Zyngier To: Nathan Chancellor Cc: kvmarm@lists.cs.columbia.edu, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Sven Peter , Catalin Marinas , Hector Martin , linux-kernel@vger.kernel.org, asahi@lists.linux.dev, Thomas Gleixner , Will Deacon , Alyssa Rosenzweig Subject: Re: [PATCH 1/3] KVM: arm64: vgic: Add Apple M2 cpus to the list of broken SEIS implementations In-Reply-To: References: <20230103095022.3230946-1-maz@kernel.org> <20230103095022.3230946-2-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: nathan@kernel.org, kvmarm@lists.cs.columbia.edu, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, sven@svenpeter.dev, catalin.marinas@arm.com, marcan@marcan.st, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, tglx@linutronix.de, will@kernel.org, alyssa@rosenzweig.io X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Nathan, On Tue, 03 Jan 2023 17:59:12 +0000, Nathan Chancellor wrote: > > Hi Marc, > > I have only been lurking on the kvmarm mailing list for a little bit and > it has mainly just been reading patches/review to get more familiar with > various virtualization concepts so I apologize if the following review > is rather shallow but... No need to apologise. Any extra pair of eye is welcome, specially when the idiot behind the keyboard writes stuff like the patch below... > > On Tue, Jan 03, 2023 at 09:50:20AM +0000, Marc Zyngier wrote: > > I really hoped that Apple had fixed their not-quite-a-vgic implementation > > when moving from M1 to M2. Alas, it seems they didn't, and running > > a buggy EFI version results in the vgic generating SErrors outside > > of the guest and taking the host down. > > > > Apply the same workaround as for M1. Yes, this is all a bit crap. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/include/asm/cputype.h | 4 ++++ > > arch/arm64/kvm/vgic/vgic-v3.c | 3 ++- > > 2 files changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h > > index 4e8b66c74ea2..683ca3af4084 100644 > > --- a/arch/arm64/include/asm/cputype.h > > +++ b/arch/arm64/include/asm/cputype.h > > @@ -124,6 +124,8 @@ > > #define APPLE_CPU_PART_M1_FIRESTORM_PRO 0x025 > > #define APPLE_CPU_PART_M1_ICESTORM_MAX 0x028 > > #define APPLE_CPU_PART_M1_FIRESTORM_MAX 0x029 > > +#define APPLE_CPU_PART_M2_BLIZZARD 0x032 > > +#define APPLE_CPU_PART_M2_AVALANCHE 0x033 > > > > #define AMPERE_CPU_PART_AMPERE1 0xAC3 > > > > @@ -177,6 +179,8 @@ > > #define MIDR_APPLE_M1_FIRESTORM_PRO MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_PRO) > > #define MIDR_APPLE_M1_ICESTORM_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM_MAX) > > #define MIDR_APPLE_M1_FIRESTORM_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_MAX) > > +#define MIDR_APPLE_M2_BLIZZARD MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD) > > +#define MIDR_APPLE_M2_AVALANCHE MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE) > > #define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1) > > > > /* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */ > > diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c > > index 826ff6f2a4e7..c6442b08fe80 100644 > > --- a/arch/arm64/kvm/vgic/vgic-v3.c > > +++ b/arch/arm64/kvm/vgic/vgic-v3.c > > @@ -615,7 +615,8 @@ static const struct midr_range broken_seis[] = { > > MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_PRO), > > MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_PRO), > > MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_MAX), > > - MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_MAX), > > The commit message makes no note of this removal, was it intentional? > MIDR_APPLE_M1_FIRESTORM_MAX is only used here so I assume it is not. Absolutely not intentional :-/ Thanks a lot for spotting this! I'll fix this immediately (good thing I didn't send the fixes PR!). Thanks again, M. -- Without deviation from the norm, progress is not possible.