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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id t5-20020a5d49c5000000b0028cf987d944sm15564419wrs.33.2023.01.03.17.10.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 Jan 2023 17:10:59 -0800 (PST) Message-ID: Date: Wed, 4 Jan 2023 01:10:58 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH 2/4] interconnect: qcom: rpm: Set QoS parameters regardless of RPM bw setting Content-Language: en-US To: Konrad Dybcio , linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Georgi Djakov , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno References: <20230103173059.265856-1-konrad.dybcio@linaro.org> <20230103173059.265856-2-konrad.dybcio@linaro.org> <0e2bdaec-b7ba-0474-8b80-8901fcc87a0f@linaro.org> <108e52fa-e53b-220c-b0a8-b5b746aafde6@linaro.org> From: Bryan O'Donoghue In-Reply-To: <108e52fa-e53b-220c-b0a8-b5b746aafde6@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/01/2023 00:39, Konrad Dybcio wrote: > tldr: new soc good (*), old soc bad-or-no-effect (*), should ask QC I think this needs to be tested before application. If it is benign on < kernel 5.4 SoCs then that's fine too but, it does need to be validated as so. I suspect there's no silicon dependency, it is probably "just how the code was written" without any silicon dependency backing it up but, I think we need to do the work to prove that before applying. An RFT with some interconnect settings targeted for test on pre 5.4 and post 5.4 SoCs would do. --- bod