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[130.180.211.218]) by smtp.googlemail.com with ESMTPSA id q16-20020a05600c46d000b003d1f3e9df3csm55968811wmo.7.2023.01.04.05.02.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Jan 2023 05:02:19 -0800 (PST) Message-ID: <9a98300c-e845-60d6-bdf1-12010eae2075@linaro.org> Date: Wed, 4 Jan 2023 14:02:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH v6 0/3] Improve CLOCK_EVT_FEAT_C3STOP feature setting Content-Language: en-US To: Anup Patel , Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner Cc: Andrew Jones , Atish Patra , Samuel Holland , Conor Dooley , Anup Patel , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: <20230103141102.772228-1-apatel@ventanamicro.com> From: Daniel Lezcano In-Reply-To: <20230103141102.772228-1-apatel@ventanamicro.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-3.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Anup, shall I pick the entire series or just the bindings and the driver changes ? On 03/01/2023 15:10, Anup Patel wrote: > This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP > feature based on RISC-V platform capabilities. > > These patches can also be found in riscv_timer_dt_imp_v6 branch at: > https://github.com/avpatel/linux.git > > Changes since v5: > - Rebased on Linux-6.2-rc2 > > Changes since v4: > - Update commit text of PATCH1 based on Samuel's comments > - Renamed DT property "riscv,timer-can-wake-cpu" to > "riscv,timer-cannot-wake-cpu" in PATCH2 and PATCH3 > - Updated description of DT property "riscv,timer-cannot-wake-cpu" > in PATCH2 > > Changes since v3: > - Rebased on Linux-6.1-rc7 > - Replaced PATCH1 with a patch to initialize broadcast timer > > Changes since v2: > - Include Conor's revert patch as the first patch and rebased other patches > - Update PATCH2 to document bindings for separate RISC-V timer DT node > - Update PATCH3 based on RISC-V timer DT node bindings > > Changes since v1: > - Rebased on Linux-5.19-rc8 > - Renamed "riscv,always-on" DT property to "riscv,timer-can-wake-cpu" > > Anup Patel (2): > dt-bindings: timer: Add bindings for the RISC-V timer device > clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT > > Conor Dooley (1): > RISC-V: time: initialize hrtimer based broadcast clock event device > > .../bindings/timer/riscv,timer.yaml | 52 +++++++++++++++++++ > arch/riscv/kernel/time.c | 3 ++ > drivers/clocksource/timer-riscv.c | 10 ++++ > 3 files changed, 65 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/riscv,timer.yaml > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog