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Date:   Thu, 5 Jan 2023 01:20:36 +0300
From:   Serge Semin <fancer.lancer@gmail.com>
To:     Sudip Mukherjee <sudip.mukherjee@sifive.com>
Cc:     Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        jude.onyenegecha@sifive.com, ben.dooks@sifive.com,
        jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 00/15] Add support for enhanced SPI for Designware SPI
 controllers
Message-ID: <20230104222036.h4ke6maxkdvuqtqc@mobilestation>
References: <20221212180732.79167-1-sudip.mukherjee@sifive.com>
 <20221218174523.cke7ubh6nycd247c@mobilestation>
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Hi Sudip

On Sun, Dec 18, 2022 at 08:45:26PM +0300, Serge Semin wrote:
> Hi Sudip
> 
> On Mon, Dec 12, 2022 at 06:07:17PM +0000, Sudip Mukherjee wrote:
> > The is v2 of the patch series adding enhanced SPI support. Some Synopsys SSI
> > controllers support enhanced SPI which includes Dual mode, Quad mode and
> > Octal mode. DWC_ssi includes clock stretching feature in enhanced SPI modes
> > which can be used to prevent FIFO underflow and overflow conditions while
> > transmitting or receiving the data respectively.
> > 
> > This is almost a complete rework based on the review from Serge.
> 
> Thank you very much for the series. I'll have a look at it on the next
> week.

Just so you know. I haven't forgot about the series. There are some
problematic parts which I need to give more thinking than I originally
expected. I'll submit my comments very soon. Sorry for the delay.

Good news is that I've got the HW-manual for the DW SSI v1.01a
IP-core. So I'll no longer need to ask of you about that device
implementation specifics.

-Serge(y)

> 
> -Serge(y)
> 
> > 
> > 
> > -- 
> > Regards
> > Sudip
> > 
> > Sudip Mukherjee (15):
> >   spi: dw: Introduce spi_frf and STD_SPI
> >   spi: dw: update NDF while using enhanced spi mode
> >   spi: dw: update SPI_CTRLR0 register
> >   spi: dw: add check for support of enhanced spi
> >   spi: dw: Introduce enhanced mem_op
> >   spi: dw: Introduce dual/quad/octal spi
> >   spi: dw: send cmd and addr to start the spi transfer
> >   spi: dw: update irq setup to use multiple handler
> >   spi: dw: use irq handler for enhanced spi
> >   spi: dw: Calculate Receive FIFO Threshold Level
> >   spi: dw: adjust size of mem_op
> >   spi: dw: Add retry for enhanced spi mode
> >   spi: dw: detect enhanced spi mode
> >   spi: dt-bindings: snps,dw-ahb-ssi: Add generic dw-ahb-ssi version
> >   spi: dw: initialize dwc-ssi controller
> > 
> >  .../bindings/spi/snps,dw-apb-ssi.yaml         |   1 +
> >  drivers/spi/spi-dw-core.c                     | 347 +++++++++++++++++-
> >  drivers/spi/spi-dw-mmio.c                     |   1 +
> >  drivers/spi/spi-dw.h                          |  27 ++
> >  4 files changed, 364 insertions(+), 12 deletions(-)
> > 
> > -- 
> > 2.30.2
> >