Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762909AbXHTXEX (ORCPT ); Mon, 20 Aug 2007 19:04:23 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751115AbXHTXEK (ORCPT ); Mon, 20 Aug 2007 19:04:10 -0400 Received: from gate.crashing.org ([63.228.1.57]:60220 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751099AbXHTXEI (ORCPT ); Mon, 20 Aug 2007 19:04:08 -0400 In-Reply-To: <20070820224859.GA16162@flint.arm.linux.org.uk> References: <46C505B2.6030704@yahoo.com.au> <18117.4848.695269.72976@cargo.ozlabs.ibm.com> <46C516BA.60700@yahoo.com.au> <20070817235912.GA24314@linux.vnet.ibm.com> <20070818000913.GA25585@gondor.apana.org.au> <20070818010818.GQ8464@linux.vnet.ibm.com> <46C997B1.1010800@redhat.com> <417ebba299a7ad3c4b7a31c4f860a814@kernel.crashing.org> <20070820224859.GA16162@flint.arm.linux.org.uk> Mime-Version: 1.0 (Apple Message framework v623) Content-Type: text/plain; charset=US-ASCII; format=flowed Message-Id: <2bdb04581125f22122f1d230e991ea92@kernel.crashing.org> Content-Transfer-Encoding: 7bit Cc: Christoph Lameter , Paul Mackerras , heiko.carstens@de.ibm.com, horms@verge.net.au, linux-kernel@vger.kernel.org, "Paul E. McKenney" , ak@suse.de, netdev@vger.kernel.org, cfriesen@nortel.com, akpm@linux-foundation.org, rpjday@mindspring.com, Nick Piggin , linux-arch@vger.kernel.org, jesper.juhl@gmail.com, satyam@infradead.org, zlynx@acm.org, schwidefsky@de.ibm.com, Chris Snook , Herbert Xu , davem@davemloft.net, Linus Torvalds , wensong@linux-vs.org, wjiang@resilience.com From: Segher Boessenkool Subject: Re: [PATCH 0/24] make atomic_read() behave consistently across all architectures Date: Tue, 21 Aug 2007 01:02:01 +0200 To: Russell King X-Mailer: Apple Mail (2.623) Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 691 Lines: 19 >> And no, RMW on MMIO isn't "problematic" at all, either. >> >> An RMW op is a read op, a modify op, and a write op, all rolled >> into one opcode. But three actual operations. > > Maybe for some CPUs, but not all. ARM for instance can't use the > load exclusive and store exclusive instructions to MMIO space. Sure, your CPU doesn't have RMW instructions -- how to emulate those if you don't have them is a totally different thing. Segher - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/