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Message-ID: <fa4342510fdf93f809671239fe1a1df68b378357.camel@icenowy.me>
Subject: Re: [RFC PATCH 2/3] riscv: use VA+PA variant of CMO macros for DMA
 synchorization
From:   Icenowy Zheng <uwu@icenowy.me>
To:     Heiko =?ISO-8859-1?Q?St=FCbner?= <heiko@sntech.de>,
        Guo Ren <guoren@kernel.org>
Cc:     Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Samuel Holland <samuel@sholland.org>,
        Conor Dooley <conor.dooley@microchip.com>,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Date:   Fri, 06 Jan 2023 15:38:33 +0800
In-Reply-To: <2135147.irdbgypaU6@diego>
References: <20230104074146.578485-1-uwu@icenowy.me>
         <CAJF2gTTO3jx8FqMVRmfgkjO02sCVx2SVbe-Sn1uKXojyn8RDaA@mail.gmail.com>
         <bcce507a31662004262fa3bbe911f1b1ff7f27af.camel@icenowy.me>
         <2135147.irdbgypaU6@diego>
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=E5=9C=A8 2023-01-04=E6=98=9F=E6=9C=9F=E4=B8=89=E7=9A=84 13:16 +0100=EF=BC=
=8CHeiko St=C3=BCbner=E5=86=99=E9=81=93=EF=BC=9A
> Hi,
>=20
> Am Mittwoch, 4. Januar 2023, 10:27:53 CET schrieb Icenowy Zheng:
> > =E5=9C=A8 2023-01-04=E6=98=9F=E6=9C=9F=E4=B8=89=E7=9A=84 17:24 +0800=EF=
=BC=8CGuo Ren=E5=86=99=E9=81=93=EF=BC=9A
> > > On Wed, Jan 4, 2023 at 4:59 PM Icenowy Zheng <uwu@icenowy.me>
> > > wrote:
> > > >=20
> > > > =E5=9C=A8 2023-01-04=E6=98=9F=E6=9C=9F=E4=B8=89=E7=9A=84 16:50 +080=
0=EF=BC=8CGuo Ren=E5=86=99=E9=81=93=EF=BC=9A
> > > > > On Wed, Jan 4, 2023 at 3:43 PM Icenowy Zheng <uwu@icenowy.me>
> > > > > wrote:
> > > > > >=20
> > > > > > DMA synchorization is done on PA and the VA is calculated
> > > > > > from
> > > > > > the
> > > > > > PA.
> > > > > >=20
> > > > > > Use the alternative macro variant that takes both VA and PA
> > > > > > as
> > > > > > parameters, thus in case the ISA extension used support PA
> > > > > > directly, the
> > > > > > overhead for re-converting VA to PA can be omitted.
> > > > > >=20
> > > > > > Suggested-by: Guo Ren <guoren@kernel.org>
> > > > > > Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> > > > > > ---
> > > > > > =C2=A0arch/riscv/mm/dma-noncoherent.c | 8 ++++----
> > > > > > =C2=A01 file changed, 4 insertions(+), 4 deletions(-)
> > > > > >=20
> > > > > > diff --git a/arch/riscv/mm/dma-noncoherent.c
> > > > > > b/arch/riscv/mm/dma-
> > > > > > noncoherent.c
> > > > > > index d919efab6eba..a751f4aece62 100644
> > > > > > --- a/arch/riscv/mm/dma-noncoherent.c
> > > > > > +++ b/arch/riscv/mm/dma-noncoherent.c
> > > > > > @@ -19,13 +19,13 @@ void
> > > > > > arch_sync_dma_for_device(phys_addr_t
> > > > > > paddr, size_t size,
> > > > > >=20
> > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 switch (dir) {
> > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 case DMA_TO_DEVICE:
> > > > > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0 ALT_CMO_OP(clean, vaddr, size,
> > > > > > riscv_cbom_block_size);
> > > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0 ALT_CMO_OP_VPA(clean, vaddr, paddr, size,
> > > > > > riscv_cbom_block_size);
> > > > > ALT_CMO_OP -> ALT_CMO_OP_VPA, is the renaming necessary?
> > > >=20
> > > > I didn't rename the original ALT_CMO_OP, ALT_CMO_OP_VPA is
> > > > something
> > > > new.
> > > The ##_VPA is really strange.
> > >=20
> > > How about:
> > > ALT_CMO_OP=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 -> A=
LT_CMO_OP_VA
> > > ALT_CMO_OP_VPA -> ALT_CMO_OP
> >=20
> > It's thus a much bigger change.
> >=20
> > If you are not fond of _VPA, I can rename it to _VA_PA.
>=20
> before you spend too much time on this, there is currently a parallel
> discussion running about including all the other different vendor-
> specific cache management.
>=20
> See [0] and the thread before that for reference.

The code shown here seems to be only a draft, and not even testable.

>=20
> The consensus seems to be that cache-handling itself is not fast
> anyway,
> and therefore to reduce complexity for the cache handling and move
> non-zicbom cache-handling into a indirect function call that the can
> be
> overridden at runtime.

Well yes I tested this patchset on my LiteX with OpenC906, and it does
not help at all on LiteETH throughtput. So maybe this is only some
theortical gain.

>=20
>=20
> Heiko
>=20
> [0]
> https://lore.kernel.org/all/43aee000-5b89-4d94-98d2-b37b1a18a83e@app.fast=
mail.com/
>=20
>=20