Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Fri, 6 Jan 2023 21:14:51 +0000
From:   Mark Brown <broonie@kernel.org>
To:     William Zhang <william.zhang@broadcom.com>
Cc:     Linux SPI List <linux-spi@vger.kernel.org>,
        Broadcom Kernel List <bcm-kernel-feedback-list@broadcom.com>,
        anand.gore@broadcom.com, tomer.yacoby@broadcom.com,
        dan.beygelman@broadcom.com, joel.peshkin@broadcom.com,
        f.fainelli@gmail.com, jonas.gorski@gmail.com,
        kursad.oney@broadcom.com, dregan@mail.com,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 03/16] dt-bindings: spi: Add spi peripheral specific
 property
Message-ID: <Y7iPS48viBg0QRok@sirena.org.uk>
References: <20230106200809.330769-1-william.zhang@broadcom.com>
 <20230106200809.330769-4-william.zhang@broadcom.com>
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha512;
        protocol="application/pgp-signature"; boundary="BxXeJB9XJtZjxHDf"
Content-Disposition: inline
In-Reply-To: <20230106200809.330769-4-william.zhang@broadcom.com>
Precedence: bulk


--BxXeJB9XJtZjxHDf
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline

On Fri, Jan 06, 2023 at 12:07:55PM -0800, William Zhang wrote:

> brcm,no-clk-gate is a Broadcom Broadband HS SPI controller specific
> property for certain SPI device such as Broadcom ISI voice daughtercard
> to work properly. It disables the clock gating feature when the chip
> select is deasserted for any device that wants to keep the clock
> running.

Why would this property be Broadcom specific?  Other devices could in
theory implement this.

> +properties:
> +  brcm,no-clk-gate:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description:
> +      Some SPI device such as Broadcom ISI based voice daughtercard requires SPI
> +      clock running even when chip select is deasserted. By default the
> +      controller turns off or gate the clock when cs is not active to save
> +      power. This flag tells the controller driver to keep the clock running
> +      when chip select is not active.

This seems problematic with any host controlled chip select support...

--BxXeJB9XJtZjxHDf
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmO4j0oACgkQJNaLcl1U
h9BIWgf/dihY/phVPCas+x/J3zN4PzuHT1GA+ZnnnM4zDpB7C5rGVTrCRnw0sCv/
1UAmf6yaPRwRTlfd2OYlVpVzEGhRRgrMkYlJoU/bpzOVIOI00lHE+kJJpDonUWtq
hDQHSwPHxuNBeEa2EP6MFco6q/InCrji4nvDE4VLsH1IMjA6gqpplGDPFzRVAKAX
8dbRqhsk452doujt6sRXYhEkBcOJ+SSddDNMC3tgHeXNPFYjaXaqyPWAIgA7h9qU
IMNCL1wIs/sGb8OTCJa4Yuw4hTbrZceKG1hi73ZQaS++6zw6Y/X1pXKhyxIihc9K
IrlWTZZAn+ZRRQ1BNTz0GL7rqaZ+1g==
=eY8r
-----END PGP SIGNATURE-----

--BxXeJB9XJtZjxHDf--