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[2620:137:e000::1:20]) by mx.google.com with ESMTP id gb27-20020a170907961b00b0084c7e7eb6fdsi9689882ejc.131.2023.01.09.01.02.37; Mon, 09 Jan 2023 01:02:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=C4C6Qi9G; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236602AbjAIIku (ORCPT + 56 others); Mon, 9 Jan 2023 03:40:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231264AbjAIIk3 (ORCPT ); Mon, 9 Jan 2023 03:40:29 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3627C13F2C; Mon, 9 Jan 2023 00:40:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 45A0C60F52; Mon, 9 Jan 2023 08:40:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 35ABDC433EF; Mon, 9 Jan 2023 08:40:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1673253624; bh=U5DKoW+OPM3RonaccyqE/mk6gVZ2dhwMoQvYw4BqN6k=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=C4C6Qi9G92Dx3kkI04O/PAJZz/Z1LzLkgiDF/XMipLHrzrO97z/NTFg1+R70swMK0 cKSNrOl2b/WpdjitfKcuhEbRwV+fo1/XuMoHHhkV4Os+Ku3zMvH3KRY8n1sOFQkID2 LJvKHVfVHPRLPc6+AdgcORRyfriyjmWssy8Z5nlPyaJ38kFuqAb28zLDwzbMNab3b0 QJKnum1Xu+10ulymjpvLRXmTGWikaDmcEDhVy1hyPqrrqru/JDOuSa5pZUcVtz2z6G Ugyh/B7OXzyGD4GCFaa3iUYzrYZQZ4F10paWzcUTnbrIpri6bzR0N7BMVJJlwTN+HO MjSdiOQq13QiQ== Date: Mon, 9 Jan 2023 16:40:16 +0800 From: Shawn Guo To: Marcel Ziswiler Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, Marcel Ziswiler , Fabio Estevam , Frieder Schrempf , Krzysztof Kozlowski , Marek Vasut , Pengutronix Kernel Team , Reinhold Mueller , Rob Herring , Sascha Hauer , Tim Harvey Subject: Re: [PATCH v2 5/5] arm64: dts: freescale: add initial support for apalis imx8 aka quadmax Message-ID: <20230109084014.GH18301@T480> References: <20230102171023.33853-1-marcel@ziswiler.com> <20230102171023.33853-6-marcel@ziswiler.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230102171023.33853-6-marcel@ziswiler.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,WEIRD_QUOTING autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 02, 2023 at 06:10:22PM +0100, Marcel Ziswiler wrote: > From: Marcel Ziswiler > > This patch adds the device tree to support Toradex Apalis iMX8 [1] aka > QuadMax a computer on module which can be used on different carrier > boards. > > The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or > 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 > GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A > USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi > module. > > Anything that is not self-contained on the module is disabled by > default. > > The carrier board device trees include the module's device tree and > enable the supported peripherals of the carrier board. > > Some level of display functionality just landed upstream but requires > further integration/testing on our side. Therefore, currently only > basic console UART, eMMC and Ethernet functionality work fine. > > As there is no i.MX 8QuadPlus device tree upstream those have been > dropped. However, apart from an error message during boot about it > failing to bring up the second Cortex-A72 core this boots fine on > QuadPlus' as well. > > [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8 > > Signed-off-by: Marcel Ziswiler > > --- > > (no changes since v1) > > arch/arm64/boot/dts/freescale/Makefile | 5 + > .../boot/dts/freescale/imx8-apalis-eval.dtsi | 146 ++ > .../dts/freescale/imx8-apalis-ixora-v1.1.dtsi | 214 +++ > .../dts/freescale/imx8-apalis-ixora-v1.2.dtsi | 264 +++ > .../boot/dts/freescale/imx8-apalis-v1.1.dtsi | 1510 +++++++++++++++++ > .../boot/dts/freescale/imx8qm-apalis-eval.dts | 16 + > .../freescale/imx8qm-apalis-ixora-v1.1.dts | 16 + > .../dts/freescale/imx8qm-apalis-v1.1-eval.dts | 16 + > .../imx8qm-apalis-v1.1-ixora-v1.1.dts | 16 + > .../imx8qm-apalis-v1.1-ixora-v1.2.dts | 16 + > .../dts/freescale/imx8qm-apalis-v1.1.dtsi | 17 + > .../boot/dts/freescale/imx8qm-apalis.dtsi | 340 ++++ > 12 files changed, 2576 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi It's too much for a single patch. Can you split it a bit to make the reviewer's life easier? > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index ef6f364eaa18..c0d621d1d86e 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -112,6 +112,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mq-thor96.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-eval.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-ixora-v1.1.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-eval.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.1.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8qm-apalis-v1.1-ixora-v1.2.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi > new file mode 100644 > index 000000000000..010d17fc7309 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-eval.dtsi > @@ -0,0 +1,146 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +/ { > + aliases { > + rtc0 = &rtc_i2c; > + rtc1 = &rtc; > + }; > + > + reg_usb_host_vbus: regulator-usb-host-vbus { > + regulator-name = "VCC USBH2(ABCD) / USBH(3|4)"; > + }; > +}; > + > +&adc0 { > + status = "okay"; > +}; > + > +&adc1 { > + status = "okay"; > +}; > + > +/* TODO: Audio Mixer */ > + > +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ > + > +/* TODO: Display Controller */ > + > +/* TODO: DPU */ > + > +/* Apalis ETH1 */ > +&fec1 { > + status = "okay"; > +}; > + > +/* TODO: CAN */ > + > +/* TODO: GPU */ > + > +/* Apalis I2C1 */ > +&i2c2 { > + status = "okay"; > + > + atmel_mxt_ts: touch@4a { > + compatible = "atmel,maxtouch"; > + interrupt-parent = <&lsio_gpio4>; > + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>; > + reg = <0x4a>; Can this be put after `compatible`? > + reset-gpios = <&lsio_gpio4 2 GPIO_ACTIVE_LOW>; /* Apalis GPIO6 */ > + status = "disabled"; > + }; > + > + /* M41T0M6 real time clock on carrier board */ > + rtc_i2c: rtc@68 { > + compatible = "st,m41t0"; > + reg = <0x68>; > + }; > +}; > + > +/* Apalis I2C3 (CAM) */ > +&i2c3 { > + status = "okay"; > +}; > + > +/* Apalis SPI1 */ > +&lpspi0 { > + status = "okay"; > +}; > + > +/* Apalis SPI2 */ > +&lpspi2 { > + status = "okay"; > +}; > + > +/* Apalis UART3 */ > +&lpuart0 { > + status = "okay"; > +}; > + > +/* Apalis UART1 */ > +&lpuart1 { > + status = "okay"; > +}; > + > +/* Apalis UART4 */ > +&lpuart2 { > + status = "okay"; > +}; > + > +/* Apalis UART2 */ > +&lpuart3 { > + status = "okay"; > +}; > + > +/* Apalis PWM3, MXM3 pin 6 */ > +&lsio_pwm0 { > + status = "okay"; > +}; > + > +/* Apalis PWM4, MXM3 pin 8 */ > +&lsio_pwm1 { > + status = "okay"; > +}; > + > +/* Apalis PWM1, MXM3 pin 2 */ > +&lsio_pwm2 { > + status = "okay"; > +}; > + > +/* Apalis PWM2, MXM3 pin 4 */ > +&lsio_pwm3 { > + status = "okay"; > +}; > + > +/* TODO: Apalis PCIE1 */ > + > +/* TODO: Apalis BKL1_PWM */ > + > +/* TODO: Apalis DAP1 */ > + > +/* TODO: Apalis SATA1 */ > + > +/* TODO: Apalis SPDIF1 */ > + > +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ > + > +/* Apalis USBO1 */ > +&usbotg1 { > + status = "okay"; > +}; > + > +/* TODO: Apalis USBH4 SuperSpeed */ > + > +/* Apalis MMC1 */ > +&usdhc2 { > + status = "okay"; > +}; > + > +/* Apalis SD1 */ > +&usdhc3 { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi > new file mode 100644 > index 000000000000..13e745ce4ce0 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi > @@ -0,0 +1,214 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +/ { > + aliases { > + rtc0 = &rtc_i2c; > + rtc1 = &rtc; > + }; > + > + leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_leds_ixora>; > + > + /* MXM3_188 */ > + led4-green { > + label = "LED_4_GREEN"; > + gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; > + }; > + > + /* MXM3_178 */ > + led4-red { > + label = "LED_4_RED"; > + gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; > + }; > + > + /* MXM3_152 */ > + led5-green { > + label = "LED_5_GREEN"; > + gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; > + }; > + > + /* MXM3_156 */ > + led5-red { > + label = "LED_5_RED"; > + gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; > + }; > + }; > + > + reg_usb_host_vbus: regulator-usb-host-vbus { > + regulator-name = "VCC_USBH(2|4)"; > + }; > +}; > + > +&adc0 { > + status = "okay"; > +}; > + > +&adc1 { > + status = "okay"; > +}; > + > +/* TODO: Audio Mixer */ > + > +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ > + > +/* TODO: Display Controller */ > + > +/* TODO: DPU */ > + > +/* Apalis ETH1 */ > +&fec1 { > + status = "okay"; > +}; > + > +/* TODO: CAN */ > + > +/* TODO: GPU */ > + > +/* Apalis I2C1 */ > +&i2c2 { > + status = "okay"; > + > + atmel_mxt_ts: touch@4a { > + compatible = "atmel,maxtouch"; > + interrupt-parent = <&lsio_gpio4>; > + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>; > + reg = <0x4a>; > + reset-gpios = <&lsio_gpio4 2 GPIO_ACTIVE_LOW>; /* Apalis GPIO6 */ > + status = "disabled"; > + }; The identical atmel_mxt_ts seems to appear for 3 times. Don't you have a .dtsi to save such duplications? > + > + /* M41T0M6 real time clock on carrier board */ > + rtc_i2c: rtc@68 { > + compatible = "st,m41t0"; > + reg = <0x68>; > + }; Ditto? > +}; > + > +/* Apalis I2C3 (CAM) */ > +&i2c3 { > + status = "okay"; > +}; > + > +&iomuxc { > + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, > + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, > + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, > + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, > + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, > + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, > + <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>, > + <&pinctrl_sim0_gpios>, <&pinctrl_uart24_forceoff>, > + <&pinctrl_usdhc1_gpios>; > + > + pinctrl_leds_ixora: ledsixoragrp { > + fsl,pins = > + , /* LED_4_GREEN */ > + , /* LED_4_RED */ > + , /* LED_5_GREEN */ > + ; /* LED_5_RED */ Can we use the following indent style? fsl,pins = , /* LED_4_GREEN */ , /* LED_4_RED */ , /* LED_5_GREEN */ ; /* LED_5_RED */ > + }; > + > + pinctrl_uart24_forceoff: uart24forceoffgrp { > + fsl,pins = > + ; > + }; > +}; > + > +/* Apalis SPI1 */ > +&lpspi0 { > + status = "okay"; > +}; > + > +/* Apalis SPI2 */ > +&lpspi2 { > + status = "okay"; > +}; > + > +/* Apalis UART3 */ > +&lpuart0 { > + status = "okay"; > +}; > + > +/* Apalis UART1 */ > +&lpuart1 { > + status = "okay"; > +}; > + > +/* Apalis UART4 */ > +&lpuart2 { > + status = "okay"; > +}; > + > +/* Apalis UART2 */ > +&lpuart3 { > + status = "okay"; > +}; > + > +&lsio_gpio5 { > + ngpios = <32>; > + gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", > + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", > + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", > + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", > + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", > + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", > + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", > + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", > + "gpio5-31"; > +}; > + > +/* Apalis PWM3, MXM3 pin 6 */ > +&lsio_pwm0 { > + status = "okay"; > +}; > + > +/* Apalis PWM4, MXM3 pin 8 */ > +&lsio_pwm1 { > + status = "okay"; > +}; > + > +/* Apalis PWM1, MXM3 pin 2 */ > +&lsio_pwm2 { > + status = "okay"; > +}; > + > +/* Apalis PWM2, MXM3 pin 4 */ > +&lsio_pwm3 { > + status = "okay"; > +}; > + > +/* TODO: Apalis PCIE1 */ > + > +/* TODO: Apalis BKL1_PWM */ > + > +/* TODO: Apalis DAP1 */ > + > +/* TODO: Apalis SATA1 */ > + > +/* TODO: Apalis SPDIF1 */ > + > +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ > + > +/* Apalis USBO1 */ > +&usbotg1 { > + status = "okay"; > +}; > + > +/* TODO: Apalis USBH4 SuperSpeed */ > + > +/* Apalis MMC1 */ > +&usdhc2 { > + bus-width = <4>; > + pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; > + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; > + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; > + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi > new file mode 100644 > index 000000000000..61d83f826c3f > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi > @@ -0,0 +1,264 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +/ { > + aliases { > + rtc0 = &rtc_i2c; > + rtc1 = &rtc; > + }; > + > + leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_leds_ixora>; > + > + /* MXM3_188 */ > + led4-green { Did you run DT schema check? It doesn't seem to match pattern "(^led-[0-9a-f]$|led)"? > + label = "LED_4_GREEN"; > + gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>; > + }; > + > + /* MXM3_178 */ > + led4-red { > + label = "LED_4_RED"; > + gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>; > + }; > + > + /* MXM3_152 */ > + led5-green { > + label = "LED_5_GREEN"; > + gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>; > + }; > + > + /* MXM3_156 */ > + led5-red { > + label = "LED_5_RED"; > + gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>; > + }; > + }; > + > + reg_3v3_vmmc: regulator-3v3-vmmc { > + compatible = "regulator-fixed"; > + enable-active-high; Put this after 'gpio'. Stop right here. Shawn > + /* MMC1_PWR_CTRL */ > + gpio = <&lsio_gpio5 19 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_enable_3v3_vmmc>; > + regulator-max-microvolt = <3300000>; > + regulator-min-microvolt = <3300000>; > + regulator-name = "3v3_vmmc"; > + }; > + > + reg_can1_supply: regulator-can1-supply { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&lsio_gpio5 22 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_enable_can1_power>; > + regulator-name = "can1_supply"; > + }; > + > + reg_can2_supply: regulator-can2-supply { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&lsio_gpio2 8 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_sata1_act>; > + regulator-name = "can2_supply"; > + }; > + > + reg_usb_host_vbus: regulator-usb-host-vbus { > + regulator-name = "VCC_USBH(2|4)"; > + }; > +}; > + > +&adc0 { > + status = "okay"; > +}; > + > +&adc1 { > + status = "okay"; > +}; > + > +/* TODO: Audio Mixer */ > + > +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ > + > +/* TODO: Display Controller */ > + > +/* TODO: DPU */ > + > +/* Apalis ETH1 */ > +&fec1 { > + status = "okay"; > +}; > + > +/* TODO: CAN */ > + > +/* TODO: GPU */ > + > +/* Apalis I2C1 */ > +&i2c2 { > + status = "okay"; > + > + atmel_mxt_ts: touch@4a { > + compatible = "atmel,maxtouch"; > + interrupt-parent = <&lsio_gpio4>; > + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>; > + reg = <0x4a>; > + reset-gpios = <&lsio_gpio4 2 GPIO_ACTIVE_LOW>; /* Apalis GPIO6 */ > + status = "disabled"; > + }; > + > + /* M41T0M6 real time clock on carrier board */ > + rtc_i2c: rtc@68 { > + compatible = "st,m41t0"; > + reg = <0x68>; > + }; > + > + eeprom: eeprom@50 { > + compatible = "atmel,24c02"; > + pagesize = <16>; > + reg = <0x50>; > + }; > +}; > + > +/* Apalis I2C3 (CAM) */ > +&i2c3 { > + status = "okay"; > +}; > + > +&iomuxc { > + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, > + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, > + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>, > + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, > + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, > + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, > + <&pinctrl_qspi1a_gpios>, <&pinctrl_sim0_gpios>, > + <&pinctrl_uart24_forceoff>, <&pinctrl_usdhc1_gpios>; > + > + /* PMIC MMC1 power-switch */ > + pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp { > + fsl,pins = > + ; /* MXM3_148, PMIC */ > + }; > + > + /* FlexCAN PMIC */ > + pinctrl_enable_can1_power: enablecan1powergrp { > + fsl,pins = > + ; /* MXM3_158, PMIC */ > + }; > + > + pinctrl_leds_ixora: ledsixoragrp { > + fsl,pins = > + , /* LED_4_GREEN */ > + , /* LED_4_RED */ > + , /* LED_5_GREEN */ > + ; /* LED_5_RED */ > + }; > + > + pinctrl_uart24_forceoff: uart24forceoffgrp { > + fsl,pins = > + ; > + }; > +}; > + > +/* Apalis SPI1 */ > +&lpspi0 { > + status = "okay"; > +}; > + > +/* Apalis SPI2 */ > +&lpspi2 { > + status = "okay"; > +}; > + > +/* Apalis UART3 */ > +&lpuart0 { > + status = "okay"; > +}; > + > +/* Apalis UART1 */ > +&lpuart1 { > + status = "okay"; > +}; > + > +/* Apalis UART4 */ > +&lpuart2 { > + status = "okay"; > +}; > + > +/* Apalis UART2 */ > +&lpuart3 { > + status = "okay"; > +}; > + > +&lsio_gpio5 { > + ngpios = <32>; > + gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03", > + "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07", > + "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11", > + "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15", > + "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19", > + "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23", > + "gpio5-24", "UART24-FORCEOFF", "gpio5-26", > + "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30", > + "gpio5-31"; > +}; > + > +/* Apalis PWM3, MXM3 pin 6 */ > +&lsio_pwm0 { > + status = "okay"; > +}; > + > +/* Apalis PWM4, MXM3 pin 8 */ > +&lsio_pwm1 { > + status = "okay"; > +}; > + > +/* Apalis PWM1, MXM3 pin 2 */ > +&lsio_pwm2 { > + status = "okay"; > +}; > + > +/* Apalis PWM2, MXM3 pin 4 */ > +&lsio_pwm3 { > + status = "okay"; > +}; > + > +/* TODO: Apalis PCIE1 */ > + > +/* TODO: Apalis BKL1_PWM */ > + > +/* TODO: Apalis DAP1 */ > + > +/* TODO: Apalis SATA1 */ > + > +/* TODO: Apalis SPDIF1 */ > + > +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ > + > +/* Apalis USBO1 */ > +&usbotg1 { > + status = "okay"; > +}; > + > +/* TODO: Apalis USBH4 SuperSpeed */ > + > +/* Apalis MMC1 */ > +&usdhc2 { > + bus-width = <4>; > + cap-power-off-card; > + /delete-property/ no-1-8-v; > + pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>; > + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>; > + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>; > + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>; > + vmmc-supply = <®_3v3_vmmc>; > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi > new file mode 100644 > index 000000000000..0b6ff8c893e1 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi > @@ -0,0 +1,1510 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +#include > + > +/ { > + chosen { > + stdout-path = &lpuart1; > + }; > + > + /* Apalis BKL1 */ > + backlight: backlight { > + compatible = "pwm-backlight"; > + brightness-levels = <0 45 63 88 119 158 203 255>; > + default-brightness-level = <4>; > + enable-gpios = <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */ > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio_bkl_on>; > + /* TODO: hook-up to Apalis BKL1_PWM */ > + status = "disabled"; > + }; > + > + gpio_fan: gpio-fan { > + compatible = "gpio-fan"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio8>; > + gpios = <&lsio_gpio3 28 GPIO_ACTIVE_HIGH>; > + gpio-fan,speed-map = < 0 0 > + 3000 1>; > + }; > + > +/* TODO: LVDS Panel */ > + > +/* TODO: Shared PCIe/SATA Reference Clock */ > + > +/* TODO: PCIe Wi-Fi Reference Clock */ > + > + /* > + * Power management bus used to control LDO1OUT of the > + * second PMIC PF8100. This is used for controlling voltage levels of > + * typespecific RGMII signals and Apalis UART2_RTS UART2_CTS. > + * > + * IMX_SC_R_BOARD_R1 for 3.3V > + * IMX_SC_R_BOARD_R2 for 1.8V > + * IMX_SC_R_BOARD_R3 for 2.5V > + * Note that for 2.5V operation the pad muxing needs to be changed, > + * compare with PSW_OVR field of IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD. > + * > + * those power domains are mutually exclusive. > + */ > + reg_ext_rgmii: regulator-ext-rgmii { > + compatible = "regulator-fixed"; > + regulator-name = "VDD_EXT_RGMII (LDO1)"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + power-domains = <&pd IMX_SC_R_BOARD_R1>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + reg_module_3v3: regulator-module-3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "+V3.3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + reg_module_3v3_avdd: regulator-module-3v3-avdd { > + compatible = "regulator-fixed"; > + regulator-name = "+V3.3_AUDIO"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + reg_module_wifi: regulator-module-wifi { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_wifi_pdn>; > + regulator-name = "wifi_pwrdn_fake_regulator"; > + regulator-settling-time-us = <100>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + reg_pcie_switch: regulator-pcie-switch { > + compatible = "regulator-fixed"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_gpio7>; > + enable-active-high; > + gpio = <&lsio_gpio3 26 GPIO_ACTIVE_HIGH>; > + regulator-name = "pcie_switch"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + startup-delay-us = <100000>; > + }; > + > + reg_usb_host_vbus: regulator-usb-host-vbus { > + compatible = "regulator-fixed"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usbh_en>; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + enable-active-high; > + /* Apalis USBH_EN */ > + gpio = <&lsio_gpio4 4 GPIO_ACTIVE_HIGH>; > + regulator-always-on; > + }; > + > + reg_usb_hsic: regulator-usb-hsic { > + compatible = "regulator-fixed"; > + regulator-name = "usb-hsic-dummy"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + }; > + > + reg_usb_phy: regulator-usb-hsic1 { > + compatible = "regulator-fixed"; > + regulator-name = "usb-phy-dummy"; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + }; > + > + reg_vref_1v8: regulator-vref-1v8 { > + compatible = "regulator-fixed"; > + regulator-name = "+V1.8"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + decoder_boot: decoder_boot@84000000 { > + no-map; > + reg = <0 0x84000000 0 0x2000000>; > + }; > + > + encoder1_boot: encoder1_boot@86000000 { > + no-map; > + reg = <0 0x86000000 0 0x200000>; > + }; > + > + encoder2_boot: encoder2_boot@86200000 { > + no-map; > + reg = <0 0x86200000 0 0x200000>; > + }; > + > + /* > + * reserved-memory layout > + * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4 > + * Shouldn't be used at A core and Linux side. > + * > + */ > + m4_reserved: m4@88000000 { > + no-map; > + reg = <0 0x88000000 0 0x8000000>; > + }; > + > + rpmsg_reserved: rpmsg@90000000 { > + no-map; > + reg = <0 0x90200000 0 0x200000>; > + }; > + > + vdevbuffer: vdevbuffer@90400000 { > + compatible = "shared-dma-pool"; > + reg = <0 0x90400000 0 0x100000>; > + no-map; > + }; > + > + decoder_rpc: decoder_rpc@92000000 { > + no-map; > + reg = <0 0x92000000 0 0x200000>; > + }; > + > + dsp_reserved: dsp@92400000 { > + no-map; > + reg = <0 0x92400000 0 0x2000000>; > + }; > + > + encoder1_rpc: encoder1_rpc@94400000 { > + no-map; > + reg = <0 0x94400000 0 0x700000>; > + }; > + > + encoder2_rpc: encoder2_rpc@94b00000 { > + no-map; > + reg = <0 0x94b00000 0 0x700000>; > + }; > + > + /* global autoconfigured region for contiguous allocations */ > + linux,cma { > + compatible = "shared-dma-pool"; > + reusable; > + size = <0 0x3c000000>; > + alloc-ranges = <0 0xc0000000 0 0x3c000000>; > + linux,cma-default; > + }; > + }; > + > + /* TODO: Apalis Analogue Audio */ > + > + /* TODO: HDMI Audio */ > + > + /* TODO: Apalis SPDIF1 */ > + > + touchscreen: vf50-touchscreen { > + compatible = "toradex,vf50-touchscreen"; > + io-channels = <&adc1 2>,<&adc1 1>, > + <&adc1 0>,<&adc1 3>; > + interrupt-parent = <&lsio_gpio3>; > + interrupts = <22 IRQ_TYPE_LEVEL_LOW>; > + pinctrl-names = "idle","default"; > + pinctrl-0 = <&pinctrl_touchctrl_idle>, <&pinctrl_touchctrl_gpios>; > + pinctrl-1 = <&pinctrl_adc1>, <&pinctrl_touchctrl_gpios>; > + vf50-ts-min-pressure = <200>; > + xp-gpios = <&lsio_gpio2 4 GPIO_ACTIVE_LOW>; > + xm-gpios = <&lsio_gpio2 5 GPIO_ACTIVE_HIGH>; > + yp-gpios = <&lsio_gpio2 17 GPIO_ACTIVE_LOW>; > + ym-gpios = <&lsio_gpio2 21 GPIO_ACTIVE_HIGH>; > + /* > + * NOTE: you must remove the pinctrl-adc1 from the adc1 > + * node below to use the touchscreen > + */ > + status = "disabled"; > + }; > + > +}; > + > +&adc0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_adc0>; > + vref-supply = <®_vref_1v8>; > +}; > + > +&adc1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_adc1>; > + vref-supply = <®_vref_1v8>; > +}; > + > +/* TODO: Asynchronous Sample Rate Converter (ASRC) */ > + > +/* Apalis ETH1 */ > +&fec1 { > + fsl,magic-packet; > + phy-handle = <ðphy0>; > + phy-mode = "rgmii-id"; > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&pinctrl_fec1>; > + pinctrl-1 = <&pinctrl_fec1_sleep>; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy0: ethernet-phy@7 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + interrupt-parent = <&lsio_gpio1>; > + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; > + micrel,led-mode = <0>; > + reg = <7>; > + reset-assert-us = <2>; > + reset-deassert-us = <2>; > + reset-gpios = <&lsio_gpio1 11 GPIO_ACTIVE_LOW>; > + reset-names = "phy-reset"; > + }; > + }; > +}; > + > +/* TODO: Apalis CAN1 (driver upstream but device tree part missing) */ > + > +/* TODO: Apalis CAN2 (driver upstream but device tree part missing) */ > + > +/* TODO: Apalis CAN3 (optional, driver upstream but device tree part missing) */ > + > +/* TODO: Apalis HDMI1 */ > + > +/* On-module I2C */ > +&i2c1 { > + #address-cells = <1>; > + #size-cells = <0>; > + clock-frequency = <100000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpi2c1>; > + status = "okay"; > + > + /* TODO: Audio Codec */ > + > + /* USB3503A */ > + usb3503@8 { > + compatible = "smsc,usb3503a"; > + connect-gpios = <&lsio_gpio0 31 GPIO_ACTIVE_LOW>; > + initial-mode = <1>; > + intn-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usb3503a>; > + refclk-frequency = <25000000>; > + reg = <0x08>; > + reset-gpios = <&lsio_gpio1 2 GPIO_ACTIVE_LOW>; > + }; > +}; > + > +/* Apalis I2C1 */ > +&i2c2 { > + #address-cells = <1>; > + #size-cells = <0>; > + clock-frequency = <100000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpi2c2>; > +}; > + > +/* Apalis I2C3 (CAM) */ > +&i2c3 { > + #address-cells = <1>; > + #size-cells = <0>; > + clock-frequency = <100000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpi2c3>; > +}; > + > +&jpegdec { > + status = "okay"; > +}; > + > +&jpegenc { > + status = "okay"; > +}; > + > +/* TODO: Apalis LVDS1 */ > + > +/* Apalis SPI1 */ > +&lpspi0 { > + #address-cells = <1>; > + #size-cells = <0>; > + cs-gpios = <&lsio_gpio3 5 GPIO_ACTIVE_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpspi0>; > +}; > + > +/* Apalis SPI2 */ > +&lpspi2 { > + #address-cells = <1>; > + #size-cells = <0>; > + cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpspi2>; > +}; > + > +/* Apalis UART3 */ > +&lpuart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpuart0>; > +}; > + > +/* Apalis UART1 */ > +&lpuart1 { > + dma-names = "",""; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpuart1>; > +}; > + > +/* Apalis UART4 */ > +&lpuart2 { > + dma-names = "",""; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpuart2>; > +}; > + > +/* Apalis UART2 */ > +&lpuart3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpuart3>; > +}; > + > +&lsio_gpio0 { > + gpio-line-names = "MXM3_279", > + "MXM3_277", > + "MXM3_135", > + "MXM3_203", > + "MXM3_201", > + "MXM3_275", > + "MXM3_110", > + "MXM3_120", > + "MXM3_1/GPIO1", > + "MXM3_3/GPIO2", > + "MXM3_124", > + "MXM3_122", > + "MXM3_5/GPIO3", > + "MXM3_7/GPIO4", > + "", > + "", > + "MXM3_4", > + "MXM3_211", > + "MXM3_209", > + "MXM3_2", > + "MXM3_136", > + "MXM3_134", > + "MXM3_6", > + "MXM3_8", > + "MXM3_112", > + "MXM3_118", > + "MXM3_114", > + "MXM3_116"; > +}; > + > +&lsio_gpio1 { > + gpio-line-names = "", > + "", > + "", > + "", > + "MXM3_286", > + "", > + "MXM3_87", > + "MXM3_99", > + "MXM3_138", > + "MXM3_140", > + "MXM3_239", > + "", > + "MXM3_281", > + "MXM3_283", > + "MXM3_126", > + "MXM3_132", > + "", > + "", > + "", > + "", > + "MXM3_173", > + "MXM3_175", > + "MXM3_123"; > + > + hdmi-ctrl-hog { > + gpio-hog; > + gpios = <30 GPIO_ACTIVE_HIGH>; > + line-name = "CONNECTOR_IS_HDMI"; > + /* Set signals depending on HDP device type, 0 DP, 1 HDMI */ > + output-high; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_hdmi_ctrl>; > + }; > +}; > + > +&lsio_gpio2 { > + gpio-line-names = "", > + "", > + "", > + "", > + "", > + "", > + "", > + "MXM3_198", > + "MXM3_35", > + "MXM3_164", > + "", > + "", > + "", > + "", > + "MXM3_217", > + "MXM3_215", > + "", > + "", > + "MXM3_193", > + "MXM3_194", > + "MXM3_37", > + "", > + "MXM3_271", > + "MXM3_273", > + "MXM3_195", > + "MXM3_197", > + "MXM3_177", > + "MXM3_179", > + "MXM3_181", > + "MXM3_183", > + "MXM3_185", > + "MXM3_187"; > + > + /* > + * Add GPIO2_20 as a wakeup source: > + * Pin: 101 SC_P_SPI3_CS0 (MXM3_37/WAKE1_MICO) > + * Type: 5 SC_PAD_WAKEUP_FALL_EDGE > + * Line: 20 > + */ > + pad-wakeup = ; > + pad-wakeup-num = <1>; > + > + pcie_wifi_hog { > + gpio-hog; > + gpios = <11 GPIO_ACTIVE_HIGH>; > + line-name = "PCIE_WIFI_CLK"; > + output-high; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pcie_wifi_refclk>; > + }; > +}; > + > +&lsio_gpio3 { > + gpio-line-names = "MXM3_191", > + "", > + "MXM3_221", > + "MXM3_225", > + "MXM3_223", > + "MXM3_227", > + "MXM3_200", > + "MXM3_235", > + "MXM3_231", > + "MXM3_229", > + "MXM3_233", > + "MXM3_204", > + "MXM3_196", > + "", > + "MXM3_202", > + "", > + "", > + "", > + "MXM3_305", > + "MXM3_307", > + "MXM3_309", > + "MXM3_311", > + "MXM3_315", > + "MXM3_317", > + "MXM3_319", > + "MXM3_321", > + "MXM3_15/GPIO7", > + "MXM3_63", > + "MXM3_17/GPIO8", > + "MXM3_12", > + "MXM3_14", > + "MXM3_16"; > +}; > + > +&lsio_gpio4 { > + gpio-line-names = "MXM3_18", > + "MXM3_11/GPIO5", > + "MXM3_13/GPIO6", > + "MXM3_274", > + "MXM3_84", > + "MXM3_262", > + "MXM3_96", > + "", > + "", > + "", > + "", > + "", > + "MXM3_190", > + "", > + "", > + "", > + "MXM3_269", > + "MXM3_251", > + "MXM3_253", > + "MXM3_295", > + "MXM3_299", > + "MXM3_301", > + "MXM3_297", > + "MXM3_293", > + "MXM3_291", > + "MXM3_289", > + "MXM3_287"; > + > + /* Enable pcie root / sata ref clock unconditionally */ > + pcie_sata_hog { > + gpio-hog; > + gpios = <11 GPIO_ACTIVE_HIGH>; > + line-name = "PCIE_SATA_CLK"; > + output-high; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pcie_sata_refclk>; > + }; > +}; > + > +&lsio_gpio5 { > + gpio-line-names = "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "MXM3_150", > + "MXM3_160", > + "MXM3_162", > + "MXM3_144", > + "MXM3_146", > + "MXM3_148", > + "MXM3_152", > + "MXM3_156", > + "MXM3_158", > + "MXM3_159", > + "MXM3_184", > + "MXM3_180", > + "MXM3_186", > + "MXM3_188", > + "MXM3_176", > + "MXM3_178"; > +}; > + > +&lsio_gpio6 { > + gpio-line-names = "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "MXM3_261", > + "MXM3_263", > + "MXM3_259", > + "MXM3_257", > + "MXM3_255", > + "MXM3_128", > + "MXM3_130", > + "MXM3_265", > + "MXM3_249", > + "MXM3_247", > + "MXM3_245", > + "MXM3_243"; > +}; > + > +/* Apalis PWM3, MXM3 pin 6 */ > +&lsio_pwm0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm0>; > + #pwm-cells = <3>; > +}; > + > +/* Apalis PWM4, MXM3 pin 8 */ > +&lsio_pwm1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm1>; > + #pwm-cells = <3>; > +}; > + > +/* Apalis PWM1, MXM3 pin 2 */ > +&lsio_pwm2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm2>; > + #pwm-cells = <3>; > +}; > + > +/* Apalis PWM2, MXM3 pin 4 */ > +&lsio_pwm3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm3>; > + #pwm-cells = <3>; > +}; > + > +/* TODO: Messaging Units */ > + > +/* TODO: Apalis PCIE1 */ > + > +/* TODO: On-module Wi-Fi */ > + > +/* TODO: Apalis BKL1_PWM */ > + > +/* TODO: Apalis DAP1 */ > + > +/* TODO: Apalis SATA1 */ > + > +/* TODO: Apalis SPDIF1 */ > + > +/* TODO: Thermal Zones */ > + > +/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ > + > +/* TODO: Apalis USBH4 */ > + > +/* Apalis USBO1 */ > +&usbphy1 { > + phy-3p0-supply = <®_usb_phy>; > + status = "okay"; > +}; > + > +&usbotg1 { > + adp-disable; > + ci-disable-lpm; > + hnp-disable; > + over-current-active-low; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usbotg1>; > + power-active-high; > + srp-disable; > +}; > + > +/* On-module eMMC */ > +&usdhc1 { > + bus-width = <8>; > + non-removable; > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + pinctrl-0 = <&pinctrl_usdhc1>; > + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; > + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; > + status = "okay"; > +}; > + > +/* Apalis MMC1 */ > +&usdhc2 { > + bus-width = <8>; > + cd-gpios = <&lsio_gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */ > + no-1-8-v; > + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; > + pinctrl-0 = <&pinctrl_usdhc2_4bit>, > + <&pinctrl_usdhc2_8bit>, > + <&pinctrl_mmc1_cd>; > + pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, > + <&pinctrl_usdhc2_8bit_100mhz>, > + <&pinctrl_mmc1_cd>; > + pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, > + <&pinctrl_usdhc2_8bit_200mhz>, > + <&pinctrl_mmc1_cd>; > + pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, > + <&pinctrl_usdhc2_8bit_sleep>, > + <&pinctrl_mmc1_cd_sleep>; > +}; > + > +/* Apalis SD1 */ > +&usdhc3 { > + bus-width = <4>; > + cd-gpios = <&lsio_gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */ > + no-1-8-v; > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>; > + pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_sd1_cd>; > + pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>; > +}; > + > +/* TODO: Video Processing Unit (driver upstream but device tree part missing) */ > + > +&iomuxc { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, > + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, > + <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_keys>, > + <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, > + <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, > + <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, > + <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, > + <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, > + <&pinctrl_usdhc1_gpios>; > + > + /* Apalis AN1_ADC */ > + pinctrl_adc0: adc0grp { > + fsl,pins = > + /* Apalis AN1_ADC0 */ > + , > + /* Apalis AN1_ADC1 */ > + , > + /* Apalis AN1_ADC2 */ > + , > + /* Apalis AN1_TSWIP_ADC3 */ > + ; > + }; > + > + /* Apalis AN1_TS */ > + pinctrl_adc1: adc1grp { > + fsl,pins = > + /* Apalis AN1_TSPX */ > + , > + /* Apalis AN1_TSMX */ > + , > + /* Apalis AN1_TSPY */ > + , > + /* Apalis AN1_TSMY */ > + ; > + }; > + > + /* Apalis CAM1 */ > + pinctrl_cam1_gpios: cam1gpiosgrp { > + fsl,pins = > + /* Apalis CAM1_D7 */ > + , > + /* Apalis CAM1_D6 */ > + , > + /* Apalis CAM1_D5 */ > + , > + /* Apalis CAM1_D4 */ > + , > + /* Apalis CAM1_D3 */ > + , > + /* Apalis CAM1_D2 */ > + , > + /* Apalis CAM1_D1 */ > + , > + /* Apalis CAM1_D0 */ > + , > + /* Apalis CAM1_PCLK */ > + , > + /* Apalis CAM1_MCLK */ > + , > + /* Apalis CAM1_VSYNC */ > + , > + /* Apalis CAM1_HSYNC */ > + ; > + }; > + > + /* Apalis DAP1 */ > + pinctrl_dap1_gpios: dap1gpiosgrp { > + fsl,pins = > + /* Apalis DAP1_MCLK */ > + , > + /* Apalis DAP1_D_OUT */ > + , > + /* Apalis DAP1_RESET */ > + , > + /* Apalis DAP1_BIT_CLK */ > + , > + /* Apalis DAP1_D_IN */ > + , > + /* Apalis DAP1_SYNC */ > + , > + /* On-module Wi-Fi_I2S_EN# */ > + ; > + }; > + > + /* Apalis LCD1_G1+2 */ > + pinctrl_esai0_gpios: esai0gpiosgrp { > + fsl,pins = > + /* Apalis LCD1_G1 */ > + , > + /* Apalis LCD1_G2 */ > + ; > + }; > + > + /* On-module Gigabit Ethernet PHY Micrel KSZ9031 for Apalis GLAN */ > + pinctrl_fec1: fec1grp { > + fsl,pins = > + /* Use pads in 3.3V mode */ > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + /* On-module ETH_RESET# */ > + , > + /* On-module ETH_INT# */ > + ; > + }; > + > + pinctrl_fec1_sleep: fec1-sleepgrp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + }; > + > + /* Apalis LCD1_ */ > + pinctrl_fec2_gpios: fec2gpiosgrp { > + fsl,pins = > + , > + /* Apalis LCD1_R1 */ > + , > + /* Apalis LCD1_R0 */ > + , > + /* Apalis LCD1_G0 */ > + , > + /* Apalis LCD1_R7 */ > + , > + /* Apalis LCD1_DE */ > + , > + /* Apalis LCD1_HSYNC */ > + , > + /* Apalis LCD1_VSYNC */ > + , > + /* Apalis LCD1_PCLK */ > + , > + /* Apalis LCD1_R6 */ > + , > + /* Apalis LCD1_R5 */ > + , > + /* Apalis LCD1_R4 */ > + , > + /* Apalis LCD1_R3 */ > + , > + /* Apalis LCD1_R2 */ > + ; > + }; > + > + /* Apalis CAN1 */ > + pinctrl_flexcan1: flexcan0grp { > + fsl,pins = > + , > + ; > + }; > + > + /* Apalis CAN2 */ > + pinctrl_flexcan2: flexcan1grp { > + fsl,pins = > + , > + ; > + }; > + > + /* Apalis CAN3 (optional) */ > + pinctrl_flexcan3: flexcan2grp { > + fsl,pins = > + , > + ; > + }; > + > + /* Apalis GPIO1 */ > + pinctrl_gpio1: gpio1grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis GPIO2 */ > + pinctrl_gpio2: gpio2grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis GPIO3 */ > + pinctrl_gpio3: gpio3grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis GPIO4 */ > + pinctrl_gpio4: gpio4grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis GPIO5 */ > + pinctrl_gpio5: gpio5grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis GPIO6 */ > + pinctrl_gpio6: gpio6grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis GPIO7 */ > + pinctrl_gpio7: gpio7grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis GPIO8 */ > + pinctrl_gpio8: gpio8grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis BKL1_ON */ > + pinctrl_gpio_bkl_on: gpiobklongrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis WAKE1_MICO */ > + pinctrl_gpio_keys: gpiokeysgrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis USBH_OC# */ > + pinctrl_gpio_usbh_oc_n: gpiousbhocngrp { > + fsl,pins = > + ; > + }; > + > + /* On-module HDMI_CTRL */ > + pinctrl_hdmi_ctrl: hdmictrlgrp { > + fsl,pins = > + ; > + }; > + > + /* On-module I2C */ > + pinctrl_lpi2c1: lpi2c1grp { > + fsl,pins = > + , > + ; > + }; > + > + /* Apalis I2C1 */ > + pinctrl_lpi2c2: lpi2c2grp { > + fsl,pins = > + , > + ; > + }; > + > + /* Apalis I2C3 (CAM) */ > + pinctrl_lpi2c3: lpi2c3grp { > + fsl,pins = > + , > + ; > + }; > + > + /* Apalis SPI1 */ > + pinctrl_lpspi0: lpspi0grp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + /* Apalis SPI2 */ > + pinctrl_lpspi2: lpspi2grp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + /* Apalis UART3 */ > + pinctrl_lpuart0: lpuart0grp { > + fsl,pins = > + , > + ; > + }; > + > + /* Apalis UART1 */ > + pinctrl_lpuart1: lpuart1grp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + /* Apalis UART1 */ > + pinctrl_lpuart1ctrl: lpuart1ctrlgrp { > + fsl,pins = > + /* Apalis UART1_DTR */ > + , > + /* Apalis UART1_DSR */ > + , > + /* Apalis UART1_DCD */ > + , > + /* Apalis UART1_RI */ > + ; > + }; > + > + /* Apalis UART4 */ > + pinctrl_lpuart2: lpuart2grp { > + fsl,pins = > + , > + ; > + }; > + > + /* Apalis UART2 */ > + pinctrl_lpuart3: lpuart3grp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + /* Apalis TS_2 */ > + pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpiogrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis LCD1_G6+7 */ > + pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp { > + fsl,pins = > + /* Apalis LCD1_G6 */ > + , > + /* Apalis LCD1_G7 */ > + ; > + }; > + > + /* Apalis TS_3 */ > + pinctrl_mipi_dsi_0_1_en: mipidsi0-1engrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis TS_4 */ > + pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis TS_1 */ > + pinctrl_mlb_gpios: mlbgpiosgrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis MMC1_CD# */ > + pinctrl_mmc1_cd: mmc1cdgrp { > + fsl,pins = > + ; > + }; > + > + pinctrl_mmc1_cd_sleep: mmc1cdsleepgrp { > + fsl,pins = > + ; > + }; > + > + /* On-module PCIe_Wi-Fi */ > + pinctrl_pcieb: pciebgrp { > + fsl,pins = > + , > + , > + ; > + }; > + > + /* On-module PCIe_CLK_EN1 */ > + pinctrl_pcie_sata_refclk: pciesatarefclkgrp { > + fsl,pins = > + ; > + }; > + > + /* On-module PCIe_CLK_EN2 */ > + pinctrl_pcie_wifi_refclk: pciewifirefclkgrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis PWM3 */ > + pinctrl_pwm0: pwm0grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis PWM4 */ > + pinctrl_pwm1: pwm1grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis PWM1 */ > + pinctrl_pwm2: pwm2grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis PWM2 */ > + pinctrl_pwm3: pwm3grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis BKL1_PWM */ > + pinctrl_pwm_bkl: pwmbklgrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis LCD1_ */ > + pinctrl_qspi1a_gpios: qspi1agpiosgrp { > + fsl,pins = > + /* Apalis LCD1_B0 */ > + , > + /* Apalis LCD1_B1 */ > + , > + /* Apalis LCD1_B2 */ > + , > + /* Apalis LCD1_B3 */ > + , > + /* Apalis LCD1_B5 */ > + , > + /* Apalis LCD1_B7 */ > + , > + /* Apalis LCD1_B4 */ > + , > + /* Apalis LCD1_B6 */ > + ; > + }; > + > + /* On-module RESET_MOCI#_DRV */ > + pinctrl_reset_moci: resetmocigrp { > + fsl,pins = > + ; > + }; > + > + /* On-module I2S SGTL5000 for Apalis Analogue Audio */ > + pinctrl_sai1: sai1grp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + /* Apalis SATA1_ACT# */ > + pinctrl_sata1_act: sata1actgrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis SD1_CD# */ > + pinctrl_sd1_cd: sd1cdgrp { > + fsl,pins = > + ; > + }; > + > + /* On-module I2S SGTL5000 SYS_MCLK */ > + pinctrl_sgtl5000: sgtl5000grp { > + fsl,pins = > + ; > + }; > + > + /* Apalis LCD1_ */ > + pinctrl_sim0_gpios: sim0gpiosgrp { > + fsl,pins = > + /* Apalis LCD1_G5 */ > + , > + /* Apalis LCD1_G3 */ > + , > + /* Apalis TS_5 */ > + , > + /* Apalis LCD1_G4 */ > + ; > + }; > + > + /* Apalis SPDIF */ > + pinctrl_spdif0: spdif0grp { > + fsl,pins = > + , > + ; > + }; > + > + pinctrl_touchctrl_gpios: touchctrlgpiosgrp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + pinctrl_touchctrl_idle: touchctrlidlegrp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + /* On-module USB HSIC HUB (active) */ > + pinctrl_usb_hsic_active: usbh1activegrp { > + fsl,pins = > + , > + ; > + }; > + > + /* On-module USB HSIC HUB (idle) */ > + pinctrl_usb_hsic_idle: usbh1idlegrp { > + fsl,pins = > + , > + ; > + }; > + > + /* On-module USB HSIC HUB */ > + pinctrl_usb3503a: usb3503agrp { > + fsl,pins = > + /* On-module HSIC_HUB_CONNECT */ > + , > + /* On-module HSIC_INT_N */ > + , > + /* On-module HSIC_RESET_N */ > + ; > + }; > + > + /* Apalis USBH_EN */ > + pinctrl_usbh_en: usbhengrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis USBO1 */ > + pinctrl_usbotg1: usbotg1grp { > + fsl,pins = > + /* Apalis USBO1_EN */ > + , > + /* Apalis USBO1_OC# */ > + ; > + }; > + > + /* On-module eMMC */ > + pinctrl_usdhc1: usdhc1grp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + }; > + > + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + }; > + > + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + }; > + > + /* Apalis TS_6 */ > + pinctrl_usdhc1_gpios: usdhc1gpiosgrp { > + fsl,pins = > + ; > + }; > + > + /* Apalis MMC1 */ > + pinctrl_usdhc2_4bit: usdhc2grp4bitgrp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + /* On-module PMIC use */ > + ; > + }; > + > + pinctrl_usdhc2_4bit_100mhz: usdhc2-4bit100mhzgrp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + /* On-module PMIC use */ > + ; > + }; > + > + pinctrl_usdhc2_4bit_200mhz: usdhc2-4bit200mhzgrp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + /* On-module PMIC use */ > + ; > + }; > + > + pinctrl_usdhc2_8bit: usdhc2grp8bitgrp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + pinctrl_usdhc2_8bit_100mhz: usdhc2-8bit100mhzgrp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + pinctrl_usdhc2_8bit_200mhz: usdhc2-8bit200mhzgrp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + pinctrl_usdhc2_4bit_sleep: usdhc2-4bitsleepgrp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + /* On-module PMIC use */ > + ; > + }; > + > + pinctrl_usdhc2_8bit_sleep: usdhc2-8bitsleepgrp { > + fsl,pins = > + , > + , > + , > + ; > + }; > + > + /* Apalis SD1 */ > + pinctrl_usdhc3: usdhc3grp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + /* On-module PMIC use */ > + ; > + }; > + > + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + /* On-module PMIC use */ > + ; > + }; > + > + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + /* On-module PMIC use */ > + ; > + }; > + > + /* On-module Wi-Fi */ > + pinctrl_wifi: wifigrp { > + fsl,pins = > + /* On-module Wi-Fi_SUSCLK_32k */ > + , > + /* On-module Wi-Fi_PCIE_W_DISABLE */ > + ; > + }; > + > + pinctrl_wifi_pdn: wifipdngrp { > + fsl,pins = > + /* On-module Wi-Fi_POWER_DOWN */ > + ; > + }; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts > new file mode 100644 > index 000000000000..5ab0921eb599 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +/dts-v1/; > + > +#include "imx8qm-apalis.dtsi" > +#include "imx8-apalis-eval.dtsi" > + > +/ { > + model = "Toradex Apalis iMX8QM/QP on Apalis Evaluation Board"; > + compatible = "toradex,apalis-imx8-eval", > + "toradex,apalis-imx8", > + "fsl,imx8qm"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts > new file mode 100644 > index 000000000000..68ce58dc7102 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +/dts-v1/; > + > +#include "imx8qm-apalis.dtsi" > +#include "imx8-apalis-ixora-v1.1.dtsi" > + > +/ { > + model = "Toradex Apalis iMX8QM/QP on Apalis Ixora V1.1 Carrier Board"; > + compatible = "toradex,apalis-imx8-ixora-v1.1", > + "toradex,apalis-imx8", > + "fsl,imx8qm"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts > new file mode 100644 > index 000000000000..c8ff75831556 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +/dts-v1/; > + > +#include "imx8qm-apalis-v1.1.dtsi" > +#include "imx8-apalis-eval.dtsi" > + > +/ { > + model = "Toradex Apalis iMX8QM V1.1 on Apalis Evaluation Board"; > + compatible = "toradex,apalis-imx8-v1.1-eval", > + "toradex,apalis-imx8-v1.1", > + "fsl,imx8qm"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts > new file mode 100644 > index 000000000000..ad7f644968fa > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.1.dts > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +/dts-v1/; > + > +#include "imx8qm-apalis-v1.1.dtsi" > +#include "imx8-apalis-ixora-v1.1.dtsi" > + > +/ { > + model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.1 Carrier Board"; > + compatible = "toradex,apalis-imx8-v1.1-ixora-v1.1", > + "toradex,apalis-imx8-v1.1", > + "fsl,imx8qm"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts > new file mode 100644 > index 000000000000..3b2e8c93b846 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-ixora-v1.2.dts > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +/dts-v1/; > + > +#include "imx8qm-apalis-v1.1.dtsi" > +#include "imx8-apalis-ixora-v1.2.dtsi" > + > +/ { > + model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.2 Carrier Board"; > + compatible = "toradex,apalis-imx8-v1.1-ixora-v1.2", > + "toradex,apalis-imx8-v1.1", > + "fsl,imx8qm"; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi > new file mode 100644 > index 000000000000..d6a9701efa23 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi > @@ -0,0 +1,17 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +#include > +#include "imx8qm.dtsi" > +#include "imx8-apalis-v1.1.dtsi" > + > +/ { > + model = "Toradex Apalis iMX8QM V1.1"; > + compatible = "toradex,apalis-imx8-v1.1", > + "toradex,apalis-imx8", > + "fsl,imx8qm"; > +}; > + > +/* TODO: Cooling Maps */ > diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi > new file mode 100644 > index 000000000000..a0cc1b4c135d > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi > @@ -0,0 +1,340 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright 2022 Toradex > + */ > + > +#include "imx8qm-apalis-v1.1.dtsi" > + > +/ { > + model = "Toradex Apalis iMX8QM"; > + compatible = "toradex,apalis-imx8", > + "fsl,imx8qm"; > +}; > + > +ðphy0 { > + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; > +}; > + > +/* > + * Apalis iMX8QM V1.0 has PHY KSZ9031. the Micrel PHY driver > + * doesn't support setting internal PHY delay for TXC line for > + * this PHY model. Use delay on MAC side instead. > + */ > +&fec1 { > + fsl,rgmii_txc_dly; > + phy-mode = "rgmii-rxid"; > +}; > + > +/* TODO: Apalis HDMI1 */ > + > +/* Apalis I2C2 (DDC) */ > +&i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_lpi2c0>; > + #address-cells = <1>; > + #size-cells = <0>; > + clock-frequency = <100000>; > +}; > + > +&lsio_gpio0 { > + gpio-line-names = "MXM3_279", > + "MXM3_277", > + "MXM3_135", > + "MXM3_203", > + "MXM3_201", > + "MXM3_275", > + "MXM3_110", > + "MXM3_120", > + "MXM3_1/GPIO1", > + "MXM3_3/GPIO2", > + "MXM3_124", > + "MXM3_122", > + "MXM3_5/GPIO3", > + "MXM3_7/GPIO4", > + "", > + "", > + "MXM3_4", > + "MXM3_211", > + "MXM3_209", > + "MXM3_2", > + "MXM3_136", > + "MXM3_134", > + "MXM3_6", > + "MXM3_8", > + "MXM3_112", > + "MXM3_118", > + "MXM3_114", > + "MXM3_116"; > +}; > + > +&lsio_gpio1 { > + gpio-line-names = "", > + "", > + "", > + "", > + "MXM3_286", > + "", > + "MXM3_87", > + "MXM3_99", > + "MXM3_138", > + "MXM3_140", > + "MXM3_239", > + "", > + "MXM3_281", > + "MXM3_283", > + "MXM3_126", > + "MXM3_132", > + "", > + "", > + "", > + "", > + "MXM3_173", > + "MXM3_175", > + "MXM3_123"; > +}; > + > +&lsio_gpio2 { > + gpio-line-names = "", > + "", > + "", > + "", > + "", > + "", > + "", > + "MXM3_198", > + "MXM3_35", > + "MXM3_164", > + "", > + "", > + "", > + "", > + "MXM3_217", > + "MXM3_215", > + "", > + "", > + "MXM3_193", > + "MXM3_194", > + "MXM3_37", > + "", > + "MXM3_271", > + "MXM3_273", > + "MXM3_195", > + "MXM3_197", > + "MXM3_177", > + "MXM3_179", > + "MXM3_181", > + "MXM3_183", > + "MXM3_185", > + "MXM3_187"; > +}; > + > +&lsio_gpio3 { > + gpio-line-names = "MXM3_191", > + "", > + "MXM3_221", > + "MXM3_225", > + "MXM3_223", > + "MXM3_227", > + "MXM3_200", > + "MXM3_235", > + "MXM3_231", > + "MXM3_229", > + "MXM3_233", > + "MXM3_204", > + "MXM3_196", > + "", > + "MXM3_202", > + "", > + "", > + "", > + "MXM3_305", > + "MXM3_307", > + "MXM3_309", > + "MXM3_311", > + "MXM3_315", > + "MXM3_317", > + "MXM3_319", > + "MXM3_321", > + "MXM3_15/GPIO7", > + "MXM3_63", > + "MXM3_17/GPIO8", > + "MXM3_12", > + "MXM3_14", > + "MXM3_16"; > +}; > + > +&lsio_gpio4 { > + gpio-line-names = "MXM3_18", > + "MXM3_11/GPIO5", > + "MXM3_13/GPIO6", > + "MXM3_274", > + "MXM3_84", > + "MXM3_262", > + "MXM3_96", > + "", > + "", > + "", > + "", > + "", > + "MXM3_190", > + "", > + "", > + "", > + "MXM3_269", > + "MXM3_251", > + "MXM3_253", > + "MXM3_295", > + "MXM3_299", > + "MXM3_301", > + "MXM3_297", > + "MXM3_293", > + "MXM3_291", > + "MXM3_289", > + "MXM3_287"; > + > + /* Enable pcie root / sata ref clock unconditionally */ > + pcie_sata_hog { > + gpios = <27 GPIO_ACTIVE_HIGH>; > + }; > + > +}; > + > +&lsio_gpio5 { > + gpio-line-names = "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "MXM3_150", > + "MXM3_160", > + "MXM3_162", > + "MXM3_144", > + "MXM3_146", > + "MXM3_148", > + "MXM3_152", > + "MXM3_156", > + "MXM3_158", > + "MXM3_159", > + "MXM3_184", > + "MXM3_180", > + "MXM3_186", > + "MXM3_188", > + "MXM3_176", > + "MXM3_178"; > +}; > + > +&lsio_gpio6 { > + gpio-line-names = "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "MXM3_261", > + "MXM3_263", > + "MXM3_259", > + "MXM3_257", > + "MXM3_255", > + "MXM3_128", > + "MXM3_130", > + "MXM3_265", > + "MXM3_249", > + "MXM3_247", > + "MXM3_245", > + "MXM3_243"; > +}; > + > +&pinctrl_fec1 { > + fsl,pins = > + /* Use pads in 1.8V mode */ > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + /* On-module ETH_RESET# */ > + , > + /* On-module ETH_INT# */ > + ; > +}; > + > +&pinctrl_fec1_sleep { > + fsl,pins = > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > +}; > + > +&iomuxc { > + /* Apalis I2C2 (DDC) */ > + pinctrl_lpi2c0: lpi2c0grp { > + fsl,pins = > + , > + ; > + }; > +}; > + > +/* On-module PCIe_CTRL0_CLKREQ */ > +&pinctrl_pcie_sata_refclk { > + fsl,pins = > + ; > +}; > + > +/* TODO: On-module Wi-Fi */ > + > +/* Apalis MMC1 */ > +&usdhc2 { > + /* > + * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates > + * issues with certain SD cards, disable 1.8V signaling for now. > + */ > + no-1-8-v; > +}; > + > +/* Apalis SD1 */ > +&usdhc3 { > + /* > + * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates > + * issues with certain SD cards, disable 1.8V signaling for now. > + */ > + no-1-8-v; > +}; > -- > 2.35.1 >