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Date:   Mon, 9 Jan 2023 11:43:35 -0800
From:   Benson Leung <bleung@google.com>
To:     Prashant Malani <pmalani@chromium.org>
Cc:     linux-kernel@vger.kernel.org, chrome-platform@lists.linux.dev,
        heikki.krogerus@linux.intel.com,
        Benson Leung <bleung@chromium.org>,
        Daisuke Nojiri <dnojiri@chromium.org>,
        "Dustin L. Howett" <dustin@howett.net>,
        Evan Green <evgreen@chromium.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Guenter Roeck <groeck@chromium.org>,
        "Gustavo A. R. Silva" <gustavoars@kernel.org>,
        Kees Cook <keescook@chromium.org>,
        Lee Jones <lee.jones@linaro.org>, Lee Jones <lee@kernel.org>,
        Sebastian Reichel <sebastian.reichel@collabora.com>,
        Stephen Boyd <swboyd@chromium.org>,
        Tinghan Shen <tinghan.shen@mediatek.com>,
        Tzung-Bi Shih <tzungbi@kernel.org>,
        Xiang wangx <wangxiang@cdjrlc.com>
Subject: Re: [PATCH 04/10] platform/chrome: cros_ec_typec: Set port alt mode
 drvdata
Message-ID: <Y7xuZ4jvd0Cl4jKp@google.com>
References: <20221228004648.793339-1-pmalani@chromium.org>
 <20221228004648.793339-5-pmalani@chromium.org>
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On Wed, Dec 28, 2022 at 12:45:07AM +0000, Prashant Malani wrote:
> Save the ChromeOS-specific Type-C port info in the port altmodes' driver
> data. This makes communication with the ChromeOS EC (Embedded
> Controller) easier when alt mode drivers need to send messages to
> peripherals.
>=20
> Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> Signed-off-by: Prashant Malani <pmalani@chromium.org>

Reviewed-by: Benson Leung <bleung@chromium.org>

> ---
>  drivers/platform/chrome/cros_ec_typec.c | 2 ++
>  1 file changed, 2 insertions(+)
>=20
> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/c=
hrome/cros_ec_typec.c
> index bc8dc8bd90b3..05dc5a63af53 100644
> --- a/drivers/platform/chrome/cros_ec_typec.c
> +++ b/drivers/platform/chrome/cros_ec_typec.c
> @@ -345,6 +345,7 @@ static int cros_typec_register_port_altmodes(struct c=
ros_typec_data *typec,
>  	if (IS_ERR(amode))
>  		return PTR_ERR(amode);
>  	port->port_altmode[CROS_EC_ALTMODE_DP] =3D amode;
> +	typec_altmode_set_drvdata(amode, port);
> =20
>  	/*
>  	 * Register TBT compatibility alt mode. The EC will not enter the mode
> @@ -358,6 +359,7 @@ static int cros_typec_register_port_altmodes(struct c=
ros_typec_data *typec,
>  	if (IS_ERR(amode))
>  		return PTR_ERR(amode);
>  	port->port_altmode[CROS_EC_ALTMODE_TBT] =3D amode;
> +	typec_altmode_set_drvdata(amode, port);
> =20
>  	port->state.alt =3D NULL;
>  	port->state.mode =3D TYPEC_STATE_USB;
> --=20
> 2.39.0.314.g84b9a713c41-goog
>=20
>=20

--=20
Benson Leung
Staff Software Engineer
Chrome OS Kernel
Google Inc.
bleung@google.com
Chromium OS Project
bleung@chromium.org

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