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Message-ID: <487a882b-8c88-095a-b6b2-d76fddcaecc6@quicinc.com>
Date:   Tue, 10 Jan 2023 13:56:02 +0800
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Subject: Re: [PATCH v2 2/3] coresight: cti: Add PM runtime call in
 enable_store
Content-Language: en-US
To:     Suzuki K Poulose <suzuki.poulose@arm.com>,
        James Clark <james.clark@arm.com>,
        <coresight@lists.linaro.org>, <mike.leach@linaro.org>
CC:     Mathieu Poirier <mathieu.poirier@linaro.org>,
        Leo Yan <leo.yan@linaro.org>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>
References: <20230106152331.1374973-1-james.clark@arm.com>
 <20230106152331.1374973-3-james.clark@arm.com>
 <91bd54ff-f1e3-aa6b-8446-ad73916be6a7@arm.com>
From:   Jinlong Mao <quic_jinlmao@quicinc.com>
In-Reply-To: <91bd54ff-f1e3-aa6b-8446-ad73916be6a7@arm.com>
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On 1/10/2023 12:47 AM, Suzuki K Poulose wrote:
> On 06/01/2023 15:23, James Clark wrote:
>> From: Mao Jinlong <quic_jinlmao@quicinc.com>
>>
>> In commit 6746eae4bbad ("coresight: cti: Fix hang in cti_disable_hw()")
>> PM runtime calls are removed from cti_enable_hw/cti_disable_hw. When
>> enabling CTI by writing enable sysfs node, clock for accessing CTI
>> register won't be enabled. Device will crash due to register access
>> issue. Add PM runtime call in enable_store to fix this issue.
>>
>> Fixes: 6746eae4bbad ("coresight: cti: Fix hang in cti_disable_hw()")
>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
>> [Change to only call pm_runtime_put if a disable happened]
>> Signed-off-by: James Clark <james.clark@arm.com>
>> ---
>>   drivers/hwtracing/coresight/coresight-cti-sysfs.c | 13 +++++++++++--
>>   1 file changed, 11 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c 
>> b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
>> index 6d59c815ecf5..71e7a8266bb3 100644
>> --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c
>> +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
>> @@ -108,10 +108,19 @@ static ssize_t enable_store(struct device *dev,
>>       if (ret)
>>           return ret;
>>   -    if (val)
>> +    if (val) {
>> +        ret = pm_runtime_resume_and_get(dev->parent);
>> +        if (ret)
>> +            return ret;
>>           ret = cti_enable(drvdata->csdev);
>> -    else
>> +        if (ret)
>> +            pm_runtime_put(dev->parent);
>> +    } else {
>>           ret = cti_disable(drvdata->csdev);
>> +        if (!ret)
>> +            pm_runtime_put(dev->parent);
>> +    }
>> +
>>       if (ret)
>>           return ret;
>>       return size;
>
> Looks good to me.
>
> @Mao Jinolong,
>
> Are you able to test the patches 1 & 2 and confirm they solve your 
> issue ?

Hi Suzuki,

Tested from my side. Patch 1 & 2 can solve the issue when enable CTI by 
writing 1 to enable sysfs node.

Thanks
Jinlong Mao
>
> Suzuki