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Date:   Mon, 9 Jan 2023 23:56:28 -0800
From:   Guru Das Srinagesh <quic_gurus@quicinc.com>
To:     Bjorn Andersson <andersson@kernel.org>
CC:     Sibi Sankar <quic_sibis@quicinc.com>,
        <krzysztof.kozlowski+dt@linaro.org>, <agross@kernel.org>,
        <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>,
        <konrad.dybcio@somainline.org>, <robimarko@gmail.com>,
        <quic_rjendra@quicinc.com>
Subject: Re: [PATCH V6 2/2] firmware: qcom: scm: Add wait-queue handling logic
Message-ID: <20230110075628.GA2082@quicinc.com>
References: <20221208064031.2875-1-quic_sibis@quicinc.com>
 <20221208064031.2875-3-quic_sibis@quicinc.com>
 <20221208221125.bflo7unhcrgfsgbr@builder.lan>
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On Dec 08 2022 16:11, Bjorn Andersson wrote:
> On Thu, Dec 08, 2022 at 12:10:31PM +0530, Sibi Sankar wrote:

...

> > +
> > +	err = idr_alloc_u32(&scm->waitq.idr, wq, &wq_ctx_idr,
> > +			    U32_MAX, GFP_ATOMIC);
> 
> PS. Thinking about it further, imagine the firmware people deciding to
> be funny and allocating the wq_ctx in a cyclic fashion. The idr will
> consume all your ram after a while...

Even if wq_ctx is allocated cyclically, say, from 1 to N, only N idrs would
ever be allocated as subsequently there would only be lookups. Could you
elaborate on how we would run out of RAM?

Thank you.

Guru Das.