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Wed, 11 Jan 2023 03:14:15 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id d206-20020a621dd7000000b00589ed7ae132sm4235666pfd.13.2023.01.11.03.14.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Jan 2023 03:14:14 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: Roger Quadros , Vinod Koul , Ravi Gunasekaran , Siddharth Vadapalli Cc: Vignesh Raghavendra , linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Sinthu Raja Subject: [PATCH V3 0/2] phy: ti: j721e-wiz: Add support to manage type-C swap on Lane2 and lane3 Date: Wed, 11 Jan 2023 16:43:54 +0530 Message-Id: <20230111111356.17392-1-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BESS-ID: 1673435656-305098-5377-434-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.214.200 X-BESS-Outbound-Spam-Score: 0.40 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245393 [from cloudscan13-151.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.40 BSF_SC0_SA085b META: Custom Rule SA085b 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header X-BESS-Outbound-Spam-Status: SCORE=0.40 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND, BSF_SC0_SA085b, BSF_SC0_MISMATCH_TO X-BESS-BRTS-Status: 1 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sinthu Raja Hi All, This series of patch add support to enable lanes 2 and 3 swap by configuring the LN23 bit of the SerDes WIZ control register. Also, it's possible that the Type-C plug orientation on the DIR line will be implemented through hardware design. In that situation, there won't be an external GPIO line available, but the driver still needs to address this since the DT won't use the typec-dir-gpios property. Update code to handle if typec-dir-gpios property is not specified in DT. Changes in V3: ============= Address review comments: - Update comment to mention the LN23 SWAP along with the LN10 Changes in V2: ============= Address review comments: - Update commit description as per review comments. - Restore code to check only debounce delay only if typec-dir-gpios property is specified in DT. - Rename enum variable name from wiz_lane_typec_swap_mode to wiz_typec_master_lane. - Rename lane_phy_reg variable as master_lane_num. - Update inline comments. V1: https://lore.kernel.org/lkml/20221213124854.3779-2-sinthu.raja@ti.com/T/ V2: https://lore.kernel.org/lkml/20230106071714.30562-1-sinthu.raja@ti.com/ Sinthu Raja (2): phy: ti: j721e-wiz: Manage TypeC lane swap if typec-dir-gpios not specified phy: ti: j721e-wiz: Add support to enable LN23 Type-C swap drivers/phy/ti/phy-j721e-wiz.c | 66 ++++++++++++++++++++++++++++------ 1 file changed, 56 insertions(+), 10 deletions(-) -- 2.36.1