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[2620:137:e000::1:20]) by mx.google.com with ESMTP id g15-20020a056402428f00b00499b59e0255si11970234edc.81.2023.01.12.09.16.48; Thu, 12 Jan 2023 09:17:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=RsU09ARx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240622AbjALQkz (ORCPT + 50 others); Thu, 12 Jan 2023 11:40:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235937AbjALQh2 (ORCPT ); Thu, 12 Jan 2023 11:37:28 -0500 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 767A1CE3C; Thu, 12 Jan 2023 08:33:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1673541228; x=1705077228; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AH4oyT+fB/iCX2Fqde7niFGbiL+vs0/GDQpkC5Xb62I=; b=RsU09ARxIxQfGdOg3wLsrvclrucqcDkdJl5rN7giZAkJEsjGwAZpo7b5 VLY6MLIbJe1EObhOWQns/t8Jpv8ohL1ogE8O7fgHP+q8E1mMLm0//6yzy sE+0Gw7kOhxq6mpM/tGuMDDLd6ceEnzv0SmpRTomvDoD9krnxjySkbiB0 hSm7ZnnvGdRhrojE9Yf6eYnQDlqm2UtyTMFf8RhD4hdrIQfOlFrQrvBuc R+8bfXoT5NuegQs0QkEcGd38kxqVib6nj9soJQzoni/ThILz91jqrqE9t DVm44H1RaIT4TpLcJy2dqZ9FLMfs1VHqSJg0Xp69VgKD/phZgvPn+c6sh Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10588"; a="386089785" X-IronPort-AV: E=Sophos;i="5.97,211,1669104000"; d="scan'208";a="386089785" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2023 08:33:38 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10588"; a="726372605" X-IronPort-AV: E=Sophos;i="5.97,211,1669104000"; d="scan'208";a="726372605" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2023 08:33:38 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack Subject: [PATCH v11 104/113] KVM: TDX: Add methods to ignore guest instruction emulation Date: Thu, 12 Jan 2023 08:32:52 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Isaku Yamahata Because TDX protects TDX guest state from VMM, instructions in guest memory cannot be emulated. Implement methods to ignore guest instruction emulator. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/vmx/main.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c index c9d7d8fbd2d7..47c2b6e1e484 100644 --- a/arch/x86/kvm/vmx/main.c +++ b/arch/x86/kvm/vmx/main.c @@ -256,6 +256,30 @@ static void vt_enable_smi_window(struct kvm_vcpu *vcpu) } #endif +static bool vt_can_emulate_instruction(struct kvm_vcpu *vcpu, int emul_type, + void *insn, int insn_len) +{ + if (is_td_vcpu(vcpu)) + return false; + + return vmx_can_emulate_instruction(vcpu, emul_type, insn, insn_len); +} + +static int vt_check_intercept(struct kvm_vcpu *vcpu, + struct x86_instruction_info *info, + enum x86_intercept_stage stage, + struct x86_exception *exception) +{ + /* + * This call back is triggered by the x86 instruction emulator. TDX + * doesn't allow guest memory inspection. + */ + if (KVM_BUG_ON(is_td_vcpu(vcpu), vcpu->kvm)) + return X86EMUL_UNHANDLEABLE; + + return vmx_check_intercept(vcpu, info, stage, exception); +} + static bool vt_apic_init_signal_blocked(struct kvm_vcpu *vcpu) { if (is_td_vcpu(vcpu)) @@ -841,7 +865,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .load_mmu_pgd = vt_load_mmu_pgd, - .check_intercept = vmx_check_intercept, + .check_intercept = vt_check_intercept, .handle_exit_irqoff = vt_handle_exit_irqoff, .request_immediate_exit = vt_request_immediate_exit, @@ -870,7 +894,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = { .enable_smi_window = vt_enable_smi_window, #endif - .can_emulate_instruction = vmx_can_emulate_instruction, + .can_emulate_instruction = vt_can_emulate_instruction, .apic_init_signal_blocked = vt_apic_init_signal_blocked, .migrate_timers = vmx_migrate_timers, -- 2.25.1