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Date:   Fri, 13 Jan 2023 12:10:27 +0100
From:   Wolfram Sang <wsa+renesas@sang-engineering.com>
To:     Geert Uytterhoeven <geert@linux-m68k.org>
Cc:     linux-renesas-soc@vger.kernel.org,
        Prabhakar <prabhakar.csengg@gmail.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting
Message-ID: <Y8E8IzJYqhTXLALE@ninjato>
Mail-Followup-To: Wolfram Sang <wsa+renesas@sang-engineering.com>,
        Geert Uytterhoeven <geert@linux-m68k.org>,
        linux-renesas-soc@vger.kernel.org,
        Prabhakar <prabhakar.csengg@gmail.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        linux-kernel@vger.kernel.org
References: <20230113080550.1736-1-wsa+renesas@sang-engineering.com>
 <CAMuHMdVw+fCqEewmY7BA4q0a=WAaDguaTChGKwUXFtWMCV8SaQ@mail.gmail.com>
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> > +       regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
> > +                          RPCIF_PHYCNT_STRTIM(rpc->info->strtim),
> > +                          RPCIF_PHYCNT_STRTIM(rpc->info->strtim));
>=20
> I'm not sure this is guaranteed to work, as using rpc->info->strtim as
> the mask may not clear all bits (e.g. on R-Car M3-W it is 6, not 7), and
> the initial values of the bits are documented to be undefined.

Okay, thanks! I will fix this.


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