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From:   devi priya <quic_devipriy@quicinc.com>
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CC:     <quic_srichara@quicinc.com>, <quic_gokulsri@quicinc.com>,
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Subject: [PATCH 0/6] Add APSS clock controller support for IPQ9574
Date:   Fri, 13 Jan 2023 20:06:41 +0530
Message-ID: <20230113143647.14961-1-quic_devipriy@quicinc.com>
MIME-Version: 1.0
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The APSS clock controller in IPQ9574 based devices supports cpu with
frequencies above 800Mhz

This patch series adds the support for the same

This series depends on the below patchset
https://lore.kernel.org/linux-arm-msm/20230110121316.24892-1-quic_devipriy@quicinc.com/

devi priya (6):
  dt-bindings: clock: Add YAML schemas for QCOM A73 PLL
  clk: qcom: ipq9574: Enable APSS clock driver
  arm64: defconfig: Enable ipq6018 apss clock and PLL controller
  arm64: dts: qcom: ipq9574: Add support for APSS clock controller
  dt-bindings: mailbox: Add compatible for IPQ9574
  clk: qcom: Fix APSS PLL and RCG Configuration

 .../bindings/clock/qcom,a73pll.yaml           | 52 +++++++++++++++++++
 .../mailbox/qcom,apcs-kpss-global.yaml        |  3 ++
 arch/arm64/boot/dts/qcom/ipq9574.dtsi         | 17 ++++++
 arch/arm64/configs/defconfig                  |  1 +
 drivers/clk/qcom/apss-ipq-pll.c               | 14 +++++
 drivers/clk/qcom/apss-ipq6018.c               |  8 ++-
 drivers/mailbox/qcom-apcs-ipc-mailbox.c       |  5 ++
 7 files changed, 99 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,a73pll.yaml


base-commit: 1fe4fd6f5cad346e598593af36caeadc4f5d4fa9
-- 
2.17.1