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In-Reply-To: <20230110230618.pfz267jj5ne34ava@pengutronix.de>
From:   Sasha Finkelstein <fnkl.kernel@gmail.com>
Date:   Fri, 13 Jan 2023 21:25:08 +0300
Message-ID: <CAMT+MTToR+0_CmVBuGfLemALUv1XuevObAMB=TQXV0Vd7HdW5Q@mail.gmail.com>
Subject: Re: [PATCH v6 2/5] pwm: Add Apple PWM controller
To:     =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= 
        <u.kleine-koenig@pengutronix.de>
Cc:     thierry.reding@gmail.com, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, marcan@marcan.st,
        sven@svenpeter.dev, alyssa@rosenzweig.io, asahi@lists.linux.dev,
        linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
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On Wed, 11 Jan 2023 at 02:06, Uwe Kleine-K=C3=B6nig
<u.kleine-koenig@pengutronix.de> wrote:
> > + * Limitations:
> > + * - The writes to cycle registers are shadowed until a write to
> > + *   the control register.
> > + * - If both OFF_CYCLES and ON_CYCLES are set to 0, the output
> > + *   is a constant off signal.
>
> How does the PWM behave with *APPLE_PWM_CTRLAPPLE_PWM_CTRL =3D 0?
> (typically: drives constant low)
>
APPLE_PWM_CTRL =3D 0 implies that the APPLE_CTRL_ENABLE bit is set low, whi=
ch
turns off the pwm signal (constant low). I do not think that it is
necessary to explicitly
specify that case in the comments.

> Can you please rename such that the (maybe new) name for APPLE_PWM_CTRL
> is a prefix for the (maybe new) APPLE_CTRL_ENABLE and the other register
> bit definitions?
To make sure, you want the register named APPLE_PWM_CTRL, and the bits name=
d
APPLE_PWM_CTRL_ENABLE, APPLE_PWM_CTRL_MODE and so on?