Received: by 2002:a05:6358:a55:b0:ec:fcf4:3ecf with SMTP id 21csp1482155rwb; Fri, 13 Jan 2023 12:59:53 -0800 (PST) X-Google-Smtp-Source: AMrXdXu+5VJ9GKX9RZ+QBhDUEDY+6qitQeDUuTHeutSpuyxc8cjtpdL3at5nZ1APkqqczm4VEOJG X-Received: by 2002:a17:906:2245:b0:844:436f:8c24 with SMTP id 5-20020a170906224500b00844436f8c24mr64326981ejr.10.1673643592904; Fri, 13 Jan 2023 12:59:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673643592; cv=none; d=google.com; s=arc-20160816; b=sp+vyQhRR78zF1p9oyOiYShJ1+/EYAZCF6jiHacmh9yP/RSVhOpB1dTlKtqurc8ZZ4 ttUNlmWtMZPBg3cjwZ+ZsCsqmCyTsHXoPi7T+Lk2EHnwoQriQghir7zmIRC4fOgdWhnZ vsO2+ZBw/jvmdDWoajrCUA75Js5dOiM4u6H2IwkolsDUIc5KeS9qvjK2U/aoffelRENV RRWy0THTeuwbqwXpTltKHJ5STloC6q8pTJQwHSBIxag+Yqjn1JBAMkh79yMLIFGTu3so 7sHK7e0RihrNQwfQZ2iPvnMAaRDLPXLEbOjjUaXzBCdNR0FsIemL1ARl6eo5wV8s8S8H fJKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=puTIcObzo/xpTgliJeOkvxQh5lLqmde9gsEycjyyO08=; b=g04ZiZXn4R8EKkuQHFHAmN4O8diCNLXbFNOj5f/SNoPhcbk8MRJ9oShr8nUD6M8xwZ Ln5Nw1hV5RehKd2aET+aACb12e1Vo99T3URaOwEa1M4tG3xxUlq/Q3HwUBnvgD9wt6XA K+G3LFQgAA4Xq8KTaqpFyvnreBrZnGxwhwxkgJblt8+FgYUH5xCmkuHJ//jgsQQKBZ7/ wQTesfbsM9dIQYsxed6B903v6SC1EPv/isWPDf4knyAKu7ErAR78JppU9XExbJ6CWGCw 16O3GExaBHAFqwrq4A8OoqCa11phfCIZsi2aQVeIENkxxl57HZ3EX2x5vYtammo1eryG Pl0w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=eqLr+oJH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id nb4-20020a1709071c8400b0084d45d12a9csi12281363ejc.396.2023.01.13.12.59.40; Fri, 13 Jan 2023 12:59:52 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=eqLr+oJH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231322AbjAMUzG (ORCPT + 52 others); Fri, 13 Jan 2023 15:55:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231334AbjAMUyd (ORCPT ); Fri, 13 Jan 2023 15:54:33 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 935BB8B76D; Fri, 13 Jan 2023 12:53:53 -0800 (PST) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30DJeg8Y016399; Fri, 13 Jan 2023 20:53:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=puTIcObzo/xpTgliJeOkvxQh5lLqmde9gsEycjyyO08=; b=eqLr+oJHEtCcHRPshzrv8qauIOPvhxc9/0tJp4tgQiOSVP050TWs3G+qpanca7NLA/67 cGdoKdZkFVZYHIEOVzOXF5u+ahEh2K7NlY1oyQS+ejtjwEKIbOKNNLGqHHr9E3nrhpZB gNR+QiJqMDZCHFJA5p9PVqS+2t524ErvB9nggIMdejVTBd6LVwVVcId03DloNP+syClU 6GTxNNZgWV3ABnfrP7iV9XrPWy3VFKDtjH8SleVmWFTZpjKmNLguS2Eo6Wl5fXit3G3o mgYQqgeCgVWnD3a29gxAsFlpYig59eYTAtqAaK37o6u9ltx0+fZTCnnJLonGjSidThBU IA== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3n32wu9w7j-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Jan 2023 20:53:40 +0000 Received: from nasanex01a.na.qualcomm.com ([10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 30DKrelb020520 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Jan 2023 20:53:40 GMT Received: from asutoshd-linux1.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 13 Jan 2023 12:53:39 -0800 From: Asutosh Das To: , , CC: , , , , , , , , Asutosh Das , , Alim Akhtar , "James E.J. Bottomley" , Matthias Brugger , Arthur Simchaev , Jinyoung Choi , "open list" , "moderated list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" Subject: [PATCH v13 14/15] ufs: core: mcq: Add completion support in poll Date: Fri, 13 Jan 2023 12:48:51 -0800 Message-ID: <6ac4fbd0bef3126a5083a6cc03b052f199830009.1673557949.git.quic_asutoshd@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: pg5bVyM6ffV9l6uJ61b5zKwAxWD_KH6f X-Proofpoint-ORIG-GUID: pg5bVyM6ffV9l6uJ61b5zKwAxWD_KH6f X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-13_10,2023-01-13_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0 impostorscore=0 priorityscore=1501 mlxscore=0 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301130142 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Complete cqe requests in poll. Assumption is that several poll completion may happen in different CPUs for the same completion queue. Hence a spin lock protection is added. Co-developed-by: Can Guo Signed-off-by: Can Guo Signed-off-by: Asutosh Das Reviewed-by: Bart Van Assche Reviewed-by: Manivannan Sadhasivam Reviewed-by: Stanley Chu --- drivers/ufs/core/ufs-mcq.c | 13 +++++++++++++ drivers/ufs/core/ufshcd-priv.h | 2 ++ drivers/ufs/core/ufshcd.c | 7 +++++++ include/ufs/ufshcd.h | 2 ++ 4 files changed, 24 insertions(+) diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c index cd10d59..e710d19 100644 --- a/drivers/ufs/core/ufs-mcq.c +++ b/drivers/ufs/core/ufs-mcq.c @@ -294,6 +294,18 @@ unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba, return completed_reqs; } +unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba, + struct ufs_hw_queue *hwq) +{ + unsigned long completed_reqs; + + spin_lock(&hwq->cq_lock); + completed_reqs = ufshcd_mcq_poll_cqe_nolock(hba, hwq); + spin_unlock(&hwq->cq_lock); + + return completed_reqs; +} + void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba) { struct ufs_hw_queue *hwq; @@ -390,6 +402,7 @@ int ufshcd_mcq_init(struct ufs_hba *hba) hwq = &hba->uhq[i]; hwq->max_entries = hba->nutrs; spin_lock_init(&hwq->sq_lock); + spin_lock_init(&hwq->cq_lock); } /* The very first HW queue serves device commands */ diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h index 583fb86..9b63090 100644 --- a/drivers/ufs/core/ufshcd-priv.h +++ b/drivers/ufs/core/ufshcd-priv.h @@ -75,6 +75,8 @@ unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba, struct ufs_hw_queue *hwq); struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba, struct request *req); +unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba, + struct ufs_hw_queue *hwq); #define UFSHCD_MCQ_IO_QUEUE_OFFSET 1 #define SD_ASCII_STD true diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 3afa076..cb1bca4 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -5461,6 +5461,13 @@ static int ufshcd_poll(struct Scsi_Host *shost, unsigned int queue_num) struct ufs_hba *hba = shost_priv(shost); unsigned long completed_reqs, flags; u32 tr_doorbell; + struct ufs_hw_queue *hwq; + + if (is_mcq_enabled(hba)) { + hwq = &hba->uhq[queue_num + UFSHCD_MCQ_IO_QUEUE_OFFSET]; + + return ufshcd_mcq_poll_cqe_lock(hba, hwq); + } spin_lock_irqsave(&hba->outstanding_lock, flags); tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 0dcb104..33973e9 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -1086,6 +1086,7 @@ struct ufs_hba { * @sq_lock: serialize submission queue access * @cq_tail_slot: current slot to which CQ tail pointer is pointing * @cq_head_slot: current slot to which CQ head pointer is pointing + * @cq_lock: Synchronize between multiple polling instances */ struct ufs_hw_queue { void __iomem *mcq_sq_head; @@ -1103,6 +1104,7 @@ struct ufs_hw_queue { spinlock_t sq_lock; u32 cq_tail_slot; u32 cq_head_slot; + spinlock_t cq_lock; }; static inline bool is_mcq_enabled(struct ufs_hba *hba) -- 2.7.4