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From:   "Duan, Zhenzhong" <zhenzhong.duan@intel.com>
To:     Bjorn Helgaas <helgaas@kernel.org>
CC:     "bhelgaas@google.com" <bhelgaas@google.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Yang, Lixiao" <lixiao.yang@intel.com>,
        "Peng, Chao P" <chao.p.peng@intel.com>
Subject: RE: RESEND: MMCONFIG related question
Thread-Topic: RESEND: MMCONFIG related question
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Date:   Mon, 16 Jan 2023 01:53:45 +0000
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 <20230113135343.GA1834989@bhelgaas>
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>-----Original Message-----
>From: Bjorn Helgaas <helgaas@kernel.org>
>Sent: Friday, January 13, 2023 9:54 PM
>To: Duan, Zhenzhong <zhenzhong.duan@intel.com>
>Cc: bhelgaas@google.com; linux-kernel@vger.kernel.org; Yang, Lixiao
><lixiao.yang@intel.com>; Peng, Chao P <chao.p.peng@intel.com>
>Subject: Re: RESEND: MMCONFIG related question
>
>On Fri, Jan 13, 2023 at 10:15:45AM +0000, Duan, Zhenzhong wrote:
>> Recently Lixiao reported sriov disappered for cards which supported
>> sriov. We found it's related to commit "07eab0901ed efi/x86: Remove
>> EfiMemoryMappedIO from E820 map" which removed
>EfiMemoryMappedIO
>> regions from E820 map which lead to pci_mmcfg_reject_broken() check
>> failed, raw_pci_ext_ops isn't set to pci_mmcfg finally, below is the
>> related log. I know maybe bios should add MMCONFIG region into ACPI
>> motherboard resources, just want to ask if we would support the case
>> when MMCONFIG is missed in ACPI motherboard resources as I see it's
>> treated as "Firmware Info" not "Firmware bug". Thanks
>
>The patches here:
>https://lore.kernel.org/linux-pci/20230110180243.1590045-1-
>helgaas@kernel.org/
>should resolve this problem.
Will try.

>
>> Also has another question, if MMCONFIG happened to be in
>> EfiMemoryMappedIO, even if it's removed from E820 map so that there is
>> no CRS clip for that region, could it be used for BAR space?
>
>MMCONFIG cannot be used for BAR space.  MMCONFIG should be reported
>via PNP0C02 _CRS.  BAR space, i.e., a PCI host bridge aperture, should be
>reported via PNP0A03 _CRS.
>
>> Will there be conflict for BAR and MMCONFIG access?
>
>I don't think so, but I don't completely understand the scenario you're as=
king
>about.
I mean the case when MMCONFIG space reported by ACPI table overlap with PCI=
 host bridge aperture reported by PNP0A03 _CRS. Just realized this case sho=
uld be firmware bug, sorry for confusing.

>
>The E820 clipping of PCI host bridge windows is only intended to work arou=
nd
>an issue where PNP0A03 _CRS reports space that is not part of the host bri=
dge
>windows.  E.g., there were a few platforms that seemed to report host brid=
ge
>register space via _CRS.
Understood, thanks Bjorn.