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Message-ID: <3e18a79b-fdd8-63f8-c27a-7515bbb6cb9b@linaro.org>
Date:   Mon, 16 Jan 2023 21:48:58 +0530
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From:   bhupesh.sharma@linaro.org
To:     Konrad Dybcio <konrad.dybcio@linaro.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        agross@kernel.org, andersson@kernel.org,
        linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com,
        robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org
Subject: Re: [PATCH] dt-bindings: qcom: geni-se: Fix '#address-cells' &
 '#size-cells' related dt-binding error
References: <20230113201038.267449-1-bhupesh.sharma@linaro.org>
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On 1/16/23 9:35 PM, Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
> 
> 
> On 16.01.2023 17:02, Bhupesh Sharma wrote:
> >
> > On 1/16/23 9:24 PM, Konrad Dybcio wrote:
> >>
> >>
> >> On 16.01.2023 16:43, Bhupesh Sharma wrote:
> >>> On Mon, 16 Jan 2023 at 13:23, Krzysztof Kozlowski
> >>> <krzysztof.kozlowski@linaro.org> wrote:
> >>>>
> >>>> On 15/01/2023 22:33, Bhupesh Sharma wrote:
> >>>>> On Sun, 15 Jan 2023 at 20:57, Krzysztof Kozlowski
> >>>>> <krzysztof.kozlowski@linaro.org> wrote:
> >>>>>>
> >>>>>> On 13/01/2023 21:10, Bhupesh Sharma wrote:
> >>>>>>> Fix the following '#address-cells' & '#size-cells' related
> >>>>>>> dt-binding error:
> >>>>>>>
> >>>>>>>      $ make dtbs_check
> >>>>>>>
> >>>>>>>      From schema: Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
> >>>>>>>           arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dtb: geniqup@4ac0000:
> >>>>>>>                 #address-cells:0:0: 2 was expected
> >>>>>>>         From schema: Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
> >>>>>>
> >>>>>> Don't we want rather to unify the soc address range?
> >>>>>
> >>>>> Well, the assumption in the original dt-bindings was that every reg
> >>>>> variable is 4 * u32 wide (as most new qcom SoCs set #address- and
> >>>>> #size-cells to <2>). However, that is not the case for all of the
> >>>>> SoCs.
> >>>>
> >>>> Hm, which device of that SoC cannot be used with address/size cells 2?
> >>>
> >>> As noted in the git log already the geniqup on sm6115 / sm4250 cannot
> >>> be used with address/size cells 2 (See:
> >>> https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/sm6115.dtsi#L795)
> >> SM6115 (and pretty much every other arm64 msm platform newer than 8916)
> >> should be using addr/size-cells = 2 along with (dma-)ranges of 36 bit, as
> >> that's what their smmus use and otherwise some addresses may get cut off
> >> in translation, or so the story went with 845 N years ago.. We can either
> >> pursue this patch or I can submit the 2-cell-ification if you don't plan on
> >> adding more nodes shortly
> >
> >
> > Have you tested this combination on SM6115 like SoCs with various IPs? I have tried a few experiments in the past and not all IPs work well with 36-bit DMA ranges (atleast not on the boards I have).
> Can you list any specific examples? I've been using it for
> quite some time now and I see nothing wrong..

I remember seeing some issues with SDHC controller booting (uSD card use case) with sm6115, but I cannot find the appropriate dmesg right now.

> >
> > So, I think it might lead to more breakage (unless we are sure of a well-tested fix). A simpler patch to fix the dt-bindings looks more useful IMO.
> I'm not saying no, you just have to convince Krzysztof :D

:)

Thanks,
Bhupesh