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Sender: Ingo Molnar <mingo.kernel.org@gmail.com>
Date:   Tue, 17 Jan 2023 10:23:09 +0100
From:   Ingo Molnar <mingo@kernel.org>
To:     Avadhut Naik <avadnaik@amd.com>
Cc:     linux-edac@vger.kernel.org, x86@kernel.org,
        linux-kernel@vger.kernel.org, bp@alien8.de, tony.luck@intel.com,
        yazen.ghannam@amd.com
Subject: Re: [PATCH v1 3/3] x86/MCE/AMD: Handle reassigned bit definitions
 for CS SMCA
Message-ID: <Y8Zo+hj8qxYpZdAl@gmail.com>
References: <20230116191102.4226-1-avadnaik@amd.com>
 <20230116191102.4226-4-avadnaik@amd.com>
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* Avadhut Naik <avadnaik@amd.com> wrote:

> @@ -178,6 +178,8 @@ static const struct smca_hwid smca_hwid_mcatypes[] = {
>  	{ SMCA_CS,	 HWID_MCATYPE(0x2E, 0x0)	},
>  	{ SMCA_PIE,	 HWID_MCATYPE(0x2E, 0x1)	},
>  	{ SMCA_CS_V2,	 HWID_MCATYPE(0x2E, 0x2)	},
> +	/* Software defined SMCA bank type to handle erratum 1384*/
> +	{ SMCA_CS_V2_QUIRK, HWID_MCATYPE(0x0, 0x1)  },
>  
>  	/* Unified Memory Controller MCA type */
>  	{ SMCA_UMC,	 HWID_MCATYPE(0x96, 0x0)	},
> @@ -259,6 +261,17 @@ static inline void fixup_hwid(unsigned int *hwid_mcatype)
>  
>  	if (c->x86 == 0x19) {
>  		switch (c->x86_model) {
> +		/*
> +		 * Per Genoa's revision guide, erratum 1384, some SMCA Extended
> +		 * Error Codes and SMCA Control bits are incorrect for SMCA CS
> +		 * bank type.
> +		 */
> +		case 0x10 ... 0x1F:
> +		case 0x60 ... 0x7B:
> +		case 0xA0 ... 0xAF:
> +			if (*hwid_mcatype == HWID_MCATYPE(0x2E, 0x2))
> +				*hwid_mcatype = HWID_MCATYPE(0x0, 0x1);

Why are we open-coding these types?

Why not use smca_hwid_mcatypes[SMCA_CS_V2], etc.?

> +			if (*hwid_mcatype == HWID_MCATYPE(0x2E, 0x2))
> +				*hwid_mcatype = HWID_MCATYPE(0x0, 0x1);

Ditto.

Thanks,

	Ingo