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[93.34.92.88]) by smtp.googlemail.com with ESMTPSA id s7-20020a1cf207000000b003d98438a43asm35147461wmc.34.2023.01.17.05.55.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Jan 2023 05:55:23 -0800 (PST) From: Christian Marangi To: Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi Subject: [PATCH v3 4/6] clk: qcom: clk-rcg2: don't re-search config on rcg2_set_rate Date: Tue, 17 Jan 2023 14:54:57 +0100 Message-Id: <20230117135459.16868-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230117135459.16868-1-ansuelsmth@gmail.com> References: <20230117135459.16868-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently the rcg2 driver search the rate to apply 2 times. - In _freq_tbl_determine_rate for the determine_rate function used by core clk to understand the best rate to set with set_rate - In rcg2_set_rate where the suggested rate is not trusted and searched another time using a CEIL or FLOOR policy. This is fundamentally wrong as we are ignoring what core clock is deciding and just setting whatever clock configuration we want for the suggested clock. The problem is in the fact that the correct clock should have already be searched and selected with the determine_rate function and set_rate should just apply whatever clock was provided. Rework the function using the find_req_exact and by trusting whatever core clk is asking to set. Signed-off-by: Christian Marangi --- drivers/clk/qcom/clk-rcg2.c | 23 ++++++----------------- 1 file changed, 6 insertions(+), 17 deletions(-) diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index 76551534f10d..3f15e993dc04 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -352,23 +352,12 @@ static int clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f) return update_config(rcg); } -static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, - enum freq_policy policy) +static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); const struct freq_tbl *f; - switch (policy) { - case FLOOR: - f = qcom_find_freq_floor(rcg->freq_tbl, rate); - break; - case CEIL: - f = qcom_find_freq(rcg->freq_tbl, rate); - break; - default: - return -EINVAL; - } - + f = qcom_find_freq_exact(rcg->freq_tbl, rate); if (!f) return -EINVAL; @@ -378,25 +367,25 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, static int clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { - return __clk_rcg2_set_rate(hw, rate, CEIL); + return __clk_rcg2_set_rate(hw, rate); } static int clk_rcg2_set_floor_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { - return __clk_rcg2_set_rate(hw, rate, FLOOR); + return __clk_rcg2_set_rate(hw, rate); } static int clk_rcg2_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) { - return __clk_rcg2_set_rate(hw, rate, CEIL); + return __clk_rcg2_set_rate(hw, rate); } static int clk_rcg2_set_floor_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) { - return __clk_rcg2_set_rate(hw, rate, FLOOR); + return __clk_rcg2_set_rate(hw, rate); } static int clk_rcg2_get_duty_cycle(struct clk_hw *hw, struct clk_duty *duty) -- 2.38.1