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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3082.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 97dacf63-7bb2-4ef2-c3f2-08daf942a653 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Jan 2023 10:56:27.9386 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: XtNg6KZkKCxZ2cjg3TQETWjadtWV1QONk6ey0I8CjTOqIvdlIjw63yzp6TTyNGcs X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7161 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [AMD Official Use Only - General] > -----Original Message----- > From: Greg KH > Sent: Tuesday, January 17, 2023 7:37 PM > To: Gupta, Nipun > Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; rafael@kernel.= org; > eric.auger@redhat.com; alex.williamson@redhat.com; cohuck@redhat.com; > song.bao.hua@hisilicon.com; mchehab+huawei@kernel.org; maz@kernel.org; > f.fainelli@gmail.com; jeffrey.l.hugo@gmail.com; saravanak@google.com; > Michael.Srba@seznam.cz; mani@kernel.org; yishaih@nvidia.com; > jgg@ziepe.ca; jgg@nvidia.com; robin.murphy@arm.com; will@kernel.org; > joro@8bytes.org; masahiroy@kernel.org; ndesaulniers@google.com; linux-arm= - > kernel@lists.infradead.org; linux-kbuild@vger.kernel.org; linux- > kernel@vger.kernel.org; devicetree@vger.kernel.org; okaya@kernel.org; > Anand, Harpreet ; Agarwal, Nikhil > ; Simek, Michal ; git > (AMD-Xilinx) > Subject: Re: [PATCH 01/19] bus/cdx: add the cdx bus driver >=20 > Caution: This message originated from an External Source. Use proper caut= ion > when opening attachments, clicking links, or responding. >=20 >=20 > On Tue, Jan 17, 2023 at 07:11:33PM +0530, Nipun Gupta wrote: > > Introduce AMD CDX bus, which provides a mechanism for scanning > > and probing CDX devices. These devices are memory mapped on > > system bus for Application Processors(APUs). > > > > CDX devices can be changed dynamically in the Fabric and CDX > > bus interacts with CDX controller to rescan the bus and > > rediscover the devices. > > > > Signed-off-by: Nipun Gupta > > Signed-off-by: Tarak Reddy >=20 > First off, very nice job, I didn't find any obvious issues with this > integration into the driver core. >=20 > That being said, why do you want this in drivers/bus/? Why not > drivers/cdx/ ? Thanks, Greg, for taking time out for review and providing your valuable feedback. We do not have strong affiliation to drivers/bus/cdx so will move it to drivers/cdx in the next spin. >=20 > One minor comment to make the code smaller: >=20 > > +static int get_free_index(void) > > +{ > > + unsigned long id_map; > > + unsigned long mask; > > + int index =3D 0; > > + > > + mask =3D (1UL << MAX_CDX_CONTROLLERS) - 1; > > +retry: > > + id_map =3D cdx_controller_id_map[0]; > > + if ((id_map & mask) =3D=3D mask) > > + return -ENOSPC; > > + > > + index =3D ffz(id_map); > > + if (index >=3D MAX_CDX_CONTROLLERS) > > + return -ENOSPC; > > + > > + if (test_and_set_bit(index, &cdx_controller_id_map[0])) > > + goto retry; > > + > > + return index; > > +} >=20 > Why not just use the idr/ida structure instead? That will handle all of > that logic for you and get rid of your bit twiddling. Agree. Using idr/ida seems more appropriate. Will update the code accordingly. >=20 > > +/** > > + * struct cdx_dev_params - CDX device parameters > > + * @cdx: CDX controller associated with the device > > + * @parent: Associated CDX controller > > + * @vendor: Vendor ID for CDX device > > + * @device: Device ID for CDX device > > + * @bus_num: Bus number for this CDX device > > + * @dev_num: Device number for this device > > + * @res: array of MMIO region entries > > + * @res_count: number of valid MMIO regions > > + * @req_id: Requestor ID associated with CDX device > > + */ > > +struct cdx_dev_params { > > + struct cdx_controller *cdx; > > + u16 vendor; > > + u16 device; >=20 > Are these in little endian format in memory? Or native? Or something > else? While reading from the hardware, these values are little-endian; and they are converted to CPU endianness by the controller code using le_to_cpu32() and then passed as CPU endian while registering the CDX device. Thanks, Nipun >=20 > thanks, >=20 > greg k-h