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Date:   Wed, 18 Jan 2023 13:47:39 +0100
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Subject: Re: [RESEND v3 01/13] dt-binding: mediatek: add bindings for MediaTek
 mt8195 MDP3 components
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To:     =?UTF-8?B?TW91ZHkgSG8gKOS9leWul+WOnyk=?= <Moudy.Ho@mediatek.com>,
        "matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
        "mchehab@kernel.org" <mchehab@kernel.org>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>
Cc:     "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-media@vger.kernel.org" <linux-media@vger.kernel.org>,
        "linux-mediatek@lists.infradead.org" 
        <linux-mediatek@lists.infradead.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        Project_Global_Chrome_Upstream_Group 
        <Project_Global_Chrome_Upstream_Group@mediatek.com>
References: <20230116032147.23607-1-moudy.ho@mediatek.com>
 <20230116032147.23607-2-moudy.ho@mediatek.com>
 <f24a54f1-2720-3345-9596-bb8d388ba16f@linaro.org>
 <bd6bbc3d126a39dd8b8499e891b152c25b6713a7.camel@mediatek.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <bd6bbc3d126a39dd8b8499e891b152c25b6713a7.camel@mediatek.com>
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On 18/01/2023 09:52, Moudy Ho (何宗原) wrote:
> On Mon, 2023-01-16 at 09:10 +0100, Krzysztof Kozlowski wrote:
>> On 16/01/2023 04:21, Moudy Ho wrote:
> 
> (snip)
> 
>>> +  mediatek,gce-client-reg:
>>> +    description:
>>> +      The register of client driver can be configured by gce with
>>> 4 arguments
>>> +      defined in this property, such as phandle of gce, subsys id,
>>> +      register offset and size.
>>> +      Each subsys id is mapping to a base address of display
>>> function blocks
>>> +      register which is defined in the gce header
>>> +      include/dt-bindings/gce/<chip>-gce.h.
>>> +    $ref: /schemas/types.yaml#/definitions/phandle-array
>>> +    maxItems: 1
>>
>> items with items syntax instead:
>>
>>
> https://urldefense.com/v3/__https://elixir.bootlin.com/linux/v5.18-rc1/source/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml*L42__;Iw!!CTRNKA9wMg0ARbw!lcferrFFP-mshDHNL-rwJLgNKDrXF9fXoljpqL30k5YKTNvCwuC3webzR32VnQQoPeFvSvAewNkeupcT4mjdE_roxWUo$ 
>>  
>>
>>> +
> 
> (snip)
> 
>>> +
>>> +  mediatek,gce-client-reg:
>>> +    description:
>>> +      The register of client driver can be configured by gce with
>>> 4 arguments
>>> +      defined in this property, such as phandle of gce, subsys id,
>>> +      register offset and size.
>>> +      Each subsys id is mapping to a base address of display
>>> function blocks
>>> +      register which is defined in the gce header
>>> +      include/dt-bindings/gce/<chip>-gce.h.
>>
>> Full, real path please, so it could be validated with tools.
>>
>>
>> Best regards,
>> Krzysztof
>>
> 
> Hi Krzysztof,
> 
> Sorry to bug you again about this property, could it be changed to
> following form.
> 
>     mediatek,gce-client-reg:
>       $ref: /schemas/types.yaml#/definitions/phandle-array
>       items:
>         items:
>           - description: phandle of GCE
>           - description: GCE subsys id
>           - description: register offset
>           - description: register size
>       description:
>         ... defined in <include/dt-bindings/gce/mt8195-gce.h>.
>      maxItems: 1 
>   
> Also, is the include header path still necessary in this form?

No.

Best regards,
Krzysztof