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Date:   Wed, 18 Jan 2023 23:43:00 +0000
From:   Conor Dooley <conor@kernel.org>
To:     Hal Feng <hal.feng@starfivetech.com>
Cc:     linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Ben Dooks <ben.dooks@sifive.com>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Linus Walleij <linus.walleij@linaro.org>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 7/7] riscv: dts: starfive: Add StarFive JH7110
 VisionFive 2 board device tree
Message-ID: <Y8iEBOjLthlNX/xy@spud>
References: <20221220011247.35560-1-hal.feng@starfivetech.com>
 <20221220011247.35560-8-hal.feng@starfivetech.com>
 <Y72nbfJxYdO2AojI@spud>
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On Tue, Jan 10, 2023 at 05:59:09PM +0000, Conor Dooley wrote:
> On Tue, Dec 20, 2022 at 09:12:47AM +0800, Hal Feng wrote:
>=20
> > +	aliases {
> > +		serial0 =3D &uart0;
> > +	};
> > +
> > +	chosen {
> > +		stdout-path =3D "serial0:115200n8";
> > +	};
>=20
> So I think this is wrong, and the stdout-path should be uart3 instead.
> Per the QSG [0], GPIO5/6 are the suggested UART Tx/Rx to use.
> This appears to map to uart3 rather than uart0.
> FWIW, uart3 is also the stdout-path for the v1, see:
> arch/riscv/boot/dts/starfive/jh7100-common.dtsi
>=20
> At least, that change is what I needed to do in order to use the
> JH7110_VisionFive2_upstream branch, AFAICT matches what you've got in
> this series.

I went and re-tried things again today, but with the clk & pinctrl series
=66rom the ML instead of that branch.
I'd gone and used that branch instead of the patches, as there were some
build issues with the pinctrl driver from the patches.
I fixed the build issues in the pinctrl driver and now uart0 works.

Looking at it again, it makes sense for uart0 to be serial0, given
there's pinconf stuff being done in this DT for pins 5 & 6 for uart0.

Perhaps by using that branch, I was using some older drivers etc given
it seems to mostly contain commits dating from November?
I'm still a bit confused about the whole thing, given I tried out a
whole load of branches to get something booting with ethernet support
that day!

Since this seems to work with the fixed pinctrl driver, I don't think
you need to change anything here.

Apologies for the noise!
Conor.


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