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Message-ID: <75c9bb87-92df-79c8-bcf9-e1077fef0a86@linaro.org>
Date:   Thu, 19 Jan 2023 11:41:49 +0530
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Subject: Re: [PATCH] arm64: dts: qcom: sm6115: Add interconnect nodes
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To:     Bjorn Andersson <andersson@kernel.org>
Cc:     linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        agross@kernel.org, bhupesh.linux@gmail.com,
        linux-kernel@vger.kernel.org, robh+dt@kernel.org,
        krzysztof.kozlowski@linaro.org, konrad.dybcio@linaro.org,
        a39.skl@gmail.com
References: <20221130104519.2266918-1-bhupesh.sharma@linaro.org>
 <20230118234042.ds4hqdgqjrt7ukpg@builder.lan>
From:   Bhupesh Sharma <bhupesh.sharma@linaro.org>
In-Reply-To: <20230118234042.ds4hqdgqjrt7ukpg@builder.lan>
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On 1/19/23 5:10 AM, Bjorn Andersson wrote:
> On Wed, Nov 30, 2022 at 04:15:19PM +0530, Bhupesh Sharma wrote:
>> Add the interconnect nodes inside SM6115 dtsi.
>>
>> Cc: Bjorn Andersson <andersson@kernel.org>
>> Cc: Rob Herring <robh+dt@kernel.org>
>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> 
> Seems the driver series is waiting for a v2.
> 
> I'll drop this from my queue for now, please resubmit once the DT
> binding has landed.

Sure Bjorn. I will send a v2 shortly.

Thanks,
Bhupesh

>> ---
>> - Based on linux-next/master
>> - Depends on the SM6115 dt-binding and driver patchset, which can be
>>    seen here: https://lore.kernel.org/linux-arm-msm/20221130103841.2266464-1-bhupesh.sharma@linaro.org/
>>
>>   arch/arm64/boot/dts/qcom/sm6115.dtsi | 51 ++++++++++++++++++++++++++++
>>   1 file changed, 51 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> index e4a2440ce544..dad5ab3edf0e 100644
>> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> @@ -485,6 +485,57 @@ usb_1_hsphy: phy@1613000 {
>>   			status = "disabled";
>>   		};
>>   
>> +		snoc: interconnect@1880000 {
>> +			compatible = "qcom,sm6115-snoc";
>> +			reg = <0x01880000 0x60200>;
>> +			#interconnect-cells = <1>;
>> +			clock-names = "bus", "bus_a";
>> +			clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
>> +				 <&rpmcc RPM_SMD_SNOC_A_CLK>;
>> +
>> +			clk_virt: interconnect-clk {
>> +				compatible = "qcom,sm6115-clk-virt";
>> +				#interconnect-cells = <1>;
>> +				clock-names = "bus", "bus_a";
>> +				clocks = <&rpmcc RPM_SMD_QUP_CLK>,
>> +					 <&rpmcc RPM_SMD_QUP_A_CLK>;
>> +			};
>> +
>> +			mmnrt_virt: interconnect-mmnrt {
>> +				compatible = "qcom,sm6115-mmnrt-virt";
>> +				#interconnect-cells = <1>;
>> +				clock-names = "bus", "bus_a";
>> +				clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
>> +					 <&rpmcc RPM_SMD_MMNRT_A_CLK>;
>> +			};
>> +
>> +			mmrt_virt: interconnect-mmrt {
>> +				compatible = "qcom,sm6115-mmrt-virt";
>> +				#interconnect-cells = <1>;
>> +				clock-names = "bus", "bus_a";
>> +				clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
>> +					 <&rpmcc RPM_SMD_MMRT_A_CLK>;
>> +			};
>> +		};
>> +
>> +		cnoc: interconnect@1900000 {
>> +			compatible = "qcom,sm6115-cnoc";
>> +			reg = <0x01900000 0x8200>;
>> +			#interconnect-cells = <1>;
>> +			clock-names = "bus", "bus_a";
>> +			clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
>> +				 <&rpmcc RPM_SMD_CNOC_A_CLK>;
>> +		};
>> +
>> +		bimc: interconnect@4480000 {
>> +			compatible = "qcom,sm6115-bimc";
>> +			reg = <0x04480000 0x80000>;
>> +			#interconnect-cells = <1>;
>> +			clock-names = "bus", "bus_a";
>> +			clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
>> +				 <&rpmcc RPM_SMD_BIMC_A_CLK>;
>> +		};
>> +
>>   		qfprom@1b40000 {
>>   			compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
>>   			reg = <0x01b40000 0x7000>;
>> -- 
>> 2.38.1
>>