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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jan 2023 09:49:34.0874 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c25bd968-019b-4287-42fb-08dafa027864 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0000EE3D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5299 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Skip save and restore of ASPM L1 Sub-States specific registers if they are not already enabled in the system. This is to avoid issues observed on certain platforms during restoration process, particularly when restoring the L1SS registers contents. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=216782 Signed-off-by: Vidya Sagar --- drivers/pci/pcie/aspm.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 53a1fa306e1e..5d3f09b0a6a9 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -757,15 +757,29 @@ static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state) PCI_L1SS_CTL1_L1SS_MASK, val); } +static bool skip_l1ss_restore; + void pci_save_aspm_l1ss_state(struct pci_dev *dev) { struct pci_cap_saved_state *save_state; u16 l1ss = dev->l1ss; - u32 *cap; + u32 *cap, val; if (!l1ss) return; + /* + * Skip save and restore of L1 Sub-States registers if they are not + * already enabled in the system + */ + pci_read_config_dword(dev, l1ss + PCI_L1SS_CTL1, &val); + if (!(val & PCI_L1SS_CTL1_L1SS_MASK)) { + skip_l1ss_restore = 1; + return; + } + + skip_l1ss_restore = 0; + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_L1SS); if (!save_state) return; @@ -784,6 +798,9 @@ void pci_restore_aspm_l1ss_state(struct pci_dev *dev) if (!l1ss) return; + if (skip_l1ss_restore) + return; + save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_L1SS); if (!save_state) return; -- 2.17.1