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Message-ID: <331c1a38-9483-f485-3787-3e0cf1e68985@ti.com>
Date:   Thu, 19 Jan 2023 16:21:02 +0530
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Subject: Re: [PATCH] arm64: dts: ti: k3-j7200: Fix wakeup pinmux range
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To:     Vaishnav Achath <vaishnav.a@ti.com>, <vigneshr@ti.com>,
        <nm@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
CC:     <praneeth@ti.com>, <j-keerthy@ti.com>
References: <20230119042622.22310-1-vaishnav.a@ti.com>
From:   Jayesh Choudhary <j-choudhary@ti.com>
In-Reply-To: <20230119042622.22310-1-vaishnav.a@ti.com>
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Precedence: bulk


On 19/01/23 09:56, Vaishnav Achath wrote:
> The WKUP_PADCONFIG register region in J7200 has multiple non-addressable
> regions, split the existing wkup_pmx region as follows to avoid the
> non-addressable regions and include all valid WKUP_PADCONFIG registers.
> Also update references to old nodes with new ones.
> 
> wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
> wkup_pmx1 -> 2 pins (WKUP_PADCONFIG 14 - 15)
> wkup_pmx2 -> 59 pins (WKUP_PADCONFIG 26 - 84)
> wkup_pmx3 -> 8 pins (WKUP_PADCONFIG 93 - 100)
> 
> J7200 Datasheet (Table 6-106, Section 6.4 Pin Multiplexing) :
> 	https://www.ti.com/lit/ds/symlink/dra821u.pdf
> 
> Fixes: d361ed88455f ("arm64: dts: ti: Add support for J7200 SoC")
> 
> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>

Reviewed-by: Jayesh Choudhary <j-choudhary@ti.com>

> ---
>   .../dts/ti/k3-j7200-common-proc-board.dts     |  2 +-
>   .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi      | 29 ++++++++++++++++++-
>   2 files changed, 29 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> index 6240856e4863..0d39d6b8cc0c 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
> @@ -80,7 +80,7 @@
>   	};
>   };
>   
> -&wkup_pmx0 {
> +&wkup_pmx2 {
>   	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
>   		pinctrl-single,pins = <
>   			J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index fe669deba489..de56a0165bd0 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -56,7 +56,34 @@
>   	wkup_pmx0: pinctrl@4301c000 {
>   		compatible = "pinctrl-single";
>   		/* Proxy 0 addressing */
> -		reg = <0x00 0x4301c000 0x00 0x178>;
> +		reg = <0x00 0x4301c000 0x00 0x34>;
> +		#pinctrl-cells = <1>;
> +		pinctrl-single,register-width = <32>;
> +		pinctrl-single,function-mask = <0xffffffff>;
> +	};
> +
> +	wkup_pmx1: pinctrl@0x4301c038 {
> +		compatible = "pinctrl-single";
> +		/* Proxy 0 addressing */
> +		reg = <0x00 0x4301c038 0x00 0x8>;
> +		#pinctrl-cells = <1>;
> +		pinctrl-single,register-width = <32>;
> +		pinctrl-single,function-mask = <0xffffffff>;
> +	};
> +
> +	wkup_pmx2: pinctrl@0x4301c068 {
> +		compatible = "pinctrl-single";
> +		/* Proxy 0 addressing */
> +		reg = <0x00 0x4301c068 0x00 0xec>;
> +		#pinctrl-cells = <1>;
> +		pinctrl-single,register-width = <32>;
> +		pinctrl-single,function-mask = <0xffffffff>;
> +	};
> +
> +	wkup_pmx3: pinctrl@0x4301c174 {
> +		compatible = "pinctrl-single";
> +		/* Proxy 0 addressing */
> +		reg = <0x00 0x4301c174 0x00 0x20>;
>   		#pinctrl-cells = <1>;
>   		pinctrl-single,register-width = <32>;
>   		pinctrl-single,function-mask = <0xffffffff>;