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Received: from DU0PR08MB9155.eurprd08.prod.outlook.com (2603:10a6:10:416::5) by PAXPR08MB7468.eurprd08.prod.outlook.com (2603:10a6:102:2b6::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6002.26; Thu, 19 Jan 2023 12:01:52 +0000 Received: from DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219]) by DU0PR08MB9155.eurprd08.prod.outlook.com ([fe80::4718:6092:e763:4219%2]) with mapi id 15.20.6002.024; Thu, 19 Jan 2023 12:01:51 +0000 Message-ID: Date: Thu, 19 Jan 2023 13:01:48 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH 5/5] arm64: dts: rockchip: add pinctrls for 16-bit/18-bit rgb interface to rk356x Content-Language: en-US To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Cc: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Sandy Huang , David Airlie , Daniel Vetter , Sascha Hauer References: <20221130140217.3196414-1-michael.riesch@wolfvision.net> <20221130140217.3196414-6-michael.riesch@wolfvision.net> From: Michael Riesch In-Reply-To: <20221130140217.3196414-6-michael.riesch@wolfvision.net> Content-Type: text/plain; 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Add separate > nodes for the 16-bit and 18-bit version, respectively. While at it, split > off the clock/sync signals from the data signals. > > The exact mapping of the data pins was discussed here: > https://lore.kernel.org/linux-rockchip/f33a0488-528c-99de-3279-3c0346a03fd6@wolfvision.net/T/ > > Signed-off-by: Michael Riesch This patch is somewhat independent of the other patches of the series. In particular it is not affected by the comments that this series has received so far. If there are no objections, you might consider applying it. Thanks and best regards, Michael > --- > .../boot/dts/rockchip/rk3568-pinctrl.dtsi | 94 +++++++++++++++++++ > 1 file changed, 94 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi > index 8f90c66dd9e9..0a979bfb63d9 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi > @@ -3117,4 +3117,98 @@ tsadc_pin: tsadc-pin { > <0 RK_PA1 0 &pcfg_pull_none>; > }; > }; > + > + lcdc { > + /omit-if-no-ref/ > + lcdc_clock: lcdc-clock { > + rockchip,pins = > + /* lcdc_clk */ > + <3 RK_PA0 1 &pcfg_pull_none>, > + /* lcdc_den */ > + <3 RK_PC3 1 &pcfg_pull_none>, > + /* lcdc_hsync */ > + <3 RK_PC1 1 &pcfg_pull_none>, > + /* lcdc_vsync */ > + <3 RK_PC2 1 &pcfg_pull_none>; > + }; > + > + /omit-if-no-ref/ > + lcdc_data16: lcdc-data16 { > + rockchip,pins = > + /* lcdc_d3 */ > + <2 RK_PD3 1 &pcfg_pull_none>, > + /* lcdc_d4 */ > + <2 RK_PD4 1 &pcfg_pull_none>, > + /* lcdc_d5 */ > + <2 RK_PD5 1 &pcfg_pull_none>, > + /* lcdc_d6 */ > + <2 RK_PD6 1 &pcfg_pull_none>, > + /* lcdc_d7 */ > + <2 RK_PD7 1 &pcfg_pull_none>, > + /* lcdc_d10 */ > + <3 RK_PA3 1 &pcfg_pull_none>, > + /* lcdc_d11 */ > + <3 RK_PA4 1 &pcfg_pull_none>, > + /* lcdc_d12 */ > + <3 RK_PA5 1 &pcfg_pull_none>, > + /* lcdc_d13 */ > + <3 RK_PA6 1 &pcfg_pull_none>, > + /* lcdc_d14 */ > + <3 RK_PA7 1 &pcfg_pull_none>, > + /* lcdc_d15 */ > + <3 RK_PB0 1 &pcfg_pull_none>, > + /* lcdc_d19 */ > + <3 RK_PB4 1 &pcfg_pull_none>, > + /* lcdc_d20 */ > + <3 RK_PB5 1 &pcfg_pull_none>, > + /* lcdc_d21 */ > + <3 RK_PB6 1 &pcfg_pull_none>, > + /* lcdc_d22 */ > + <3 RK_PB7 1 &pcfg_pull_none>, > + /* lcdc_d23 */ > + <3 RK_PC0 1 &pcfg_pull_none>; > + }; > + > + /omit-if-no-ref/ > + lcdc_data18: lcdc-data18 { > + rockchip,pins = > + /* lcdc_d2 */ > + <2 RK_PD2 1 &pcfg_pull_none>, > + /* lcdc_d3 */ > + <2 RK_PD3 1 &pcfg_pull_none>, > + /* lcdc_d4 */ > + <2 RK_PD4 1 &pcfg_pull_none>, > + /* lcdc_d5 */ > + <2 RK_PD5 1 &pcfg_pull_none>, > + /* lcdc_d6 */ > + <2 RK_PD6 1 &pcfg_pull_none>, > + /* lcdc_d7 */ > + <2 RK_PD7 1 &pcfg_pull_none>, > + /* lcdc_d10 */ > + <3 RK_PA3 1 &pcfg_pull_none>, > + /* lcdc_d11 */ > + <3 RK_PA4 1 &pcfg_pull_none>, > + /* lcdc_d12 */ > + <3 RK_PA5 1 &pcfg_pull_none>, > + /* lcdc_d13 */ > + <3 RK_PA6 1 &pcfg_pull_none>, > + /* lcdc_d14 */ > + <3 RK_PA7 1 &pcfg_pull_none>, > + /* lcdc_d15 */ > + <3 RK_PB0 1 &pcfg_pull_none>, > + /* lcdc_d18 */ > + <3 RK_PB3 1 &pcfg_pull_none>, > + /* lcdc_d19 */ > + <3 RK_PB4 1 &pcfg_pull_none>, > + /* lcdc_d20 */ > + <3 RK_PB5 1 &pcfg_pull_none>, > + /* lcdc_d21 */ > + <3 RK_PB6 1 &pcfg_pull_none>, > + /* lcdc_d22 */ > + <3 RK_PB7 1 &pcfg_pull_none>, > + /* lcdc_d23 */ > + <3 RK_PC0 1 &pcfg_pull_none>; > + }; > + }; > + > };