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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ansari.sh; s=key1; t=1674155161; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CBES6x1qNNbCC+Ve+6NYbTgTVKhUPguGspOpoYfBcQ0=; b=RuN+aSXdcUZw8w6JBLZkF+kPH+rFfzUS50v402ybY1AgVxxXyghVk5gqtIlMhtyawy+vB/ tbyE3igYhcKioiYlCdDrI6tC3TwkDun8DOdQH/T6fqDpFueCKzHTHenLmkJWe6moGZHpH7 2OF0KIMAQ+FjN18M8SWjZA3c/Pf719E= From: Rayyan Ansari To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Rayyan Ansari , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] ARM: dts: qcom: msm8226: add clocks and clock-names to gcc node Date: Thu, 19 Jan 2023 19:05:34 +0000 Message-Id: <20230119190534.317041-3-rayyan@ansari.sh> In-Reply-To: <20230119190534.317041-1-rayyan@ansari.sh> References: <20230119190534.317041-1-rayyan@ansari.sh> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the XO and Sleep Clock sources to the GCC node. Signed-off-by: Rayyan Ansari --- arch/arm/boot/dts/qcom-msm8226.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi index c373081bc21b..42acb9ddb8cc 100644 --- a/arch/arm/boot/dts/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -377,6 +378,11 @@ gcc: clock-controller@fc400000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&sleep_clk>; + clock-names = "xo", + "sleep_clk"; }; mmcc: clock-controller@fd8c0000 { -- 2.39.0