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[82.192.242.114]) by smtp.gmail.com with ESMTPSA id fy5-20020a170906b7c500b0084d3bf4498csm15522924ejb.140.2023.01.19.13.03.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Jan 2023 13:03:20 -0800 (PST) Sender: Salvatore Bonaccorso Received: by eldamar.lan (Postfix, from userid 1000) id 81731BE2EE8; Thu, 19 Jan 2023 22:03:19 +0100 (CET) Date: Thu, 19 Jan 2023 22:03:19 +0100 From: Salvatore Bonaccorso To: "Luis Claudio R. Goncalves" Cc: Pavel Machek , Vignesh Raghavendra , LKML , linux-rt-users , stable-rt , Steven Rostedt , Thomas Gleixner , Carsten Emde , Sebastian Andrzej Siewior , Daniel Wagner , Tom Zanussi , Clark Williams , Mark Gross , Jeff Brady , Jens Axboe Subject: Re: [ANNOUNCE] 5.10.162-rt78 Message-ID: References: <40de655e-26f3-aa7b-f1ec-6877396a9f1e@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Luis, all, On Thu, Jan 19, 2023 at 10:16:34AM -0300, Luis Claudio R. Goncalves wrote: > On Thu, Jan 19, 2023 at 12:38:25PM +0100, Pavel Machek wrote: > > Hi! > > > > > > I'm pleased to announce the 5.10.162-rt78 stable release. > > > > > > > > You can get this release via the git tree at: > > > > > > > > git://git.kernel.org/pub/scm/linux/kernel/git/rt/linux-stable-rt.git > > > > > > > > branch: v5.10-rt > > > > Head SHA1: 143ef105f40a65f3ddd57121d4b4bc36eb10cc06 > > > > > > > > Or to build 5.10.162-rt78 directly, the following patches should be applied: > > > > > I see that vanilla 5.10.162-rt78 fails to build with arm64 defconfig. [0] Full log [1] > > > Any pointers on what maybe wrong? > > > > We see the same failure. > > > > > AS arch/arm64/kernel/entry.o > > > arch/arm64/kernel/entry.S: Assembler messages: > > > arch/arm64/kernel/entry.S:763: Error: immediate out of range at operand 3 -- `and x2,x19,#((1<<1)|(1<<0)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<13)|(1<<7))' > > > make[2]: *** [scripts/Makefile.build:367: arch/arm64/kernel/entry.o] Error 1 > > > make[1]: *** [scripts/Makefile.build:503: arch/arm64/kernel] Error 2 > > > make: *** [Makefile:1837: arch/arm64] Error 2 > > > > The line is: > > > > > and x2, x19, #_TIF_WORK_MASK > > I believe this is related to the arch/arm64/include/asm/thread_info.h > changes in 5.10.162-rt78, specifically: > > 79a9991e87fe arm64: add support for TIF_NOTIFY_SIGNAL > 1ba44dcf789d Merge tag 'v5.10.162' into v5.10-rt > > The first one is the original change, coming from stable v5.10.162 and the > second one has the merge conflict I fixed in that file due to the existence > of TIF_NEED_RESCHED_LAZY in PREEMPT_RT. > > It escaped me that having TIF_NEED_RESCHED_LAZY set to 13 breaks the AND > statement reported above. Looking at > > b5a5a01d8e9a arm64: uaccess: remove addr_limit_user_check() > > specially this note > > To ensure that _TIF_WORK_MASK can be used as an immediate value in an > AND instruction (as it is in `ret_to_user`), TIF_MTE_ASYNC_FAULT is > renumbered to keep the constituent bits of _TIF_WORK_MASK contiguous. > > I understand that I need to either have to renumber TIF_NEED_RESCHED_LAZY > to 8, with the risk of breaking something else, or backport commit > b5a5a01d8e9a in order to remove TIF_FSCHECK and then safely renumber > TIF_NEED_RESCHED_LAZY. > > Guidance is welcome here :) Should we loop in here Jens, as having some overview of the needed changes for io_uring rebase in the 5.10.y version? (doing so in the mail). Regards, Salvatore