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[83.9.30.37]) by smtp.gmail.com with ESMTPSA id kz22-20020a17090777d600b007c1633cea13sm18065643ejc.12.2023.01.20.03.51.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Jan 2023 03:51:14 -0800 (PST) Message-ID: <5275d592-56f5-bc99-c4c2-d723c949265e@linaro.org> Date: Fri, 20 Jan 2023 12:51:11 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH 2/4] arm64: dts: qcom: sm6350: Add camera clock controller Content-Language: en-US To: Luca Weiss , Andy Gross , Bjorn Andersson , Loic Poulain , Robert Foss , Rob Herring , Krzysztof Kozlowski Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20221213-sm6350-cci-v1-0-e5d0c36e0c4f@fairphone.com> <20221213-sm6350-cci-v1-2-e5d0c36e0c4f@fairphone.com> From: Konrad Dybcio In-Reply-To: <20221213-sm6350-cci-v1-2-e5d0c36e0c4f@fairphone.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 20.01.2023 12:11, Luca Weiss wrote: > Add a node for the camcc found on SM6350 SoC. > > Signed-off-by: Luca Weiss > --- Reviewed-by: Konrad Dybcio Konrad > arch/arm64/boot/dts/qcom/sm6350.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi > index 8224adb99948..300ced5cda57 100644 > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi > @@ -1435,6 +1435,15 @@ usb_1_dwc3: usb@a600000 { > }; > }; > > + camcc: clock-controller@ad00000 { > + compatible = "qcom,sm6350-camcc"; > + reg = <0 0x0ad00000 0 0x16000>; > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > pdc: interrupt-controller@b220000 { > compatible = "qcom,sm6350-pdc", "qcom,pdc"; > reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x64>; >