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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ansari.sh; s=key1; t=1674329149; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6g3CbtPyBBRAm138QlEI5LXEWjs/LxVGS4Ua6nSkfY4=; b=ROHx7QI9trhmELgzXdGRcQ/0i8BhyR9KBgVkmZBqb6LqUpEJz8PtwAP5jhjUxkM67WhZIp p8D6ZyUOsZWcp06Jjcnxm6V1nHmm/3RF/pRc7uCXK2TiKQL2NjuBkLDmYsATLeyQIQ93Au M8g16xAI2Aj5qGxLUjnegYlWi0tESYw= From: Rayyan Ansari To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, Rayyan Ansari , Andy Gross , Bjorn Andersson , devicetree@vger.kernel.org, Konrad Dybcio , Krzysztof Kozlowski , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Turquette , Rob Herring , Stephen Boyd Subject: [PATCH v4 1/3] clk: qcom: smd: Add XO RPM clocks for MSM8226/MSM8974 Date: Sat, 21 Jan 2023 19:25:38 +0000 Message-Id: <20230121192540.9177-2-rayyan@ansari.sh> In-Reply-To: <20230121192540.9177-1-rayyan@ansari.sh> References: <20230121192540.9177-1-rayyan@ansari.sh> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the XO and XO_A clocks to the MSM8974 clock list, which is also used on MSM8226. Signed-off-by: Rayyan Ansari --- drivers/clk/qcom/clk-smd-rpm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 6f23ca4828f4..31f6de13d156 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -610,6 +610,8 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8936 = { }; static struct clk_smd_rpm *msm8974_clks[] = { + [RPM_SMD_XO_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo, + [RPM_SMD_XO_A_CLK_SRC] = &clk_smd_rpm_branch_bi_tcxo_a, [RPM_SMD_PNOC_CLK] = &clk_smd_rpm_bus_0_pcnoc_clk, [RPM_SMD_PNOC_A_CLK] = &clk_smd_rpm_bus_0_pcnoc_a_clk, [RPM_SMD_SNOC_CLK] = &clk_smd_rpm_bus_1_snoc_clk, -- 2.39.0