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From:   Vignesh Raghavendra <vigneshr@ti.com>
To:     Nishanth Menon <nm@ti.com>, Tero Kristo <kristo@kernel.org>,
        Santosh Shilimkar <ssantosh@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>
CC:     <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>,
        Vignesh Raghavendra <vigneshr@ti.com>
Subject: [RFC PATCH 0/2] irqchip: irq-ti-sci-inta: Add IRQ affinity support
Date:   Sun, 22 Jan 2023 13:46:05 +0530
Message-ID: <20230122081607.959474-1-vigneshr@ti.com>
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Interrupt Aggregator (INTA) IP INTA on TI's K3 SoCs convert DMA global
events (MSI like) to wired interrupts (VINT). 64 events can be mapped to
single VINT. Currently driver maps multiple events to single wired
interrupt line.  This makes setting IRQ affinity impossible as
migrating wired interrupt to different core will end up migrating all
events to that core.  And since DMA events related to networking IPs and
other high IRQ load IPs are behind this INTA logic, it creates load on a
single CPU, thus limiting overall performance of these peripherals

This series rewrites events to VINT mapping logic to have only one event
mapped to VINT as much as possible. It falls back to aggregating events
when run of unique VINTS.  In most systems there are enough VINTs to not
need aggregation. Also, if IRQ affinity and hint is set by client
driver, such VINTs are reserved and no more events are mapped to those
VINTs.

This allows to implement IRQ affinity callback as simple propagation to
affinity setting to parent irqchip (GIC).

Vignesh Raghavendra (2):
  irqchip: irq-ti-sci-inta: Don't aggregate MSI events until necessary
  irqchip: irq-ti-sci-inta: Introduce IRQ affinity support

 drivers/irqchip/irq-ti-sci-inta.c | 84 +++++++++++++++++++++++--------
 1 file changed, 64 insertions(+), 20 deletions(-)

-- 
2.39.0