Date:   Sun, 22 Jan 2023 23:37:43 +0800
From:   Chen Yu <yu.c.chen@intel.com>
To:     Yicong Yang <yangyicong@huawei.com>
CC:     <yangyicong@hisilicon.com>, Peter Zijlstra <peterz@infradead.org>,
        Vincent Guittot <vincent.guittot@linaro.org>,
        Tim Chen <tim.c.chen@intel.com>,
        Mel Gorman <mgorman@techsingularity.net>,
        "Juri Lelli" <juri.lelli@redhat.com>,
        Rik van Riel <riel@surriel.com>,
        Aaron Lu <aaron.lu@intel.com>,
        Abel Wu <wuyun.abel@bytedance.com>,
        K Prateek Nayak <kprateek.nayak@amd.com>,
        "Gautham R . Shenoy" <gautham.shenoy@amd.com>,
        "Ingo Molnar" <mingo@redhat.com>,
        Dietmar Eggemann <dietmar.eggemann@arm.com>,
        Steven Rostedt <rostedt@goodmis.org>,
        Ben Segall <bsegall@google.com>,
        Daniel Bristot de Oliveira <bristot@redhat.com>,
        Valentin Schneider <vschneid@redhat.com>,
        Hillf Danton <hdanton@sina.com>,
        Honglei Wang <wanghonglei@didichuxing.com>,
        Len Brown <len.brown@intel.com>,
        Chen Yu <yu.chen.surf@gmail.com>,
        Tianchen Ding <dtcccc@linux.alibaba.com>,
        "Joel Fernandes" <joel@joelfernandes.org>,
        Josh Don <joshdon@google.com>,
        "Barry Song" <21cnbao@gmail.com>, <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v4 0/2] sched/fair: Choose the CPU where short task
 is running during wake up
Message-ID: <Y81YRyRpg6xsyJK6@chenyu5-mobl1>
References: <cover.1671158588.git.yu.c.chen@intel.com>
 <5910589f-fe3e-5999-5821-7b2b8021e74b@huawei.com>
 <Y8lrnvLzGGJmlPor@chenyu5-mobl1>
 <d3d04f60-e3d7-9abb-4cfa-57790b359dd9@huawei.com>
Content-Type: text/plain; charset="us-ascii"
Content-Disposition: inline
In-Reply-To: <d3d04f60-e3d7-9abb-4cfa-57790b359dd9@huawei.com>
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?jy1WaWkveLj3zK8KGw54UIf6BvZ/NMVdVOSN7Kd5YI7O5U4lKL3HgpSDNAqI?=
 =?us-ascii?Q?TBOPw5OP0jQNXYORipvdhXqRilT2qXm+qWxxP4EMpmCsDG5bz+88XcQ38gBX?=
 =?us-ascii?Q?qzz68qQDvZDt6nuj4YXObymqUxcgTS1IfY9aI891lPEiC5q4/xNzofBuUuir?=
 =?us-ascii?Q?NEQeAjLzMRub8aJqFGLA2LhJREc4uRDFL+isEresGE8JR5SWojF2uoUxi0ey?=
 =?us-ascii?Q?f2WrneUWQoywmHl86tDxSLsZ17jjLpok4UHPQm2/uzx1wM+gFdqGMRiby3sU?=
 =?us-ascii?Q?hrOe+xEd1CujYLCHXxVNQWGXTp7t4rplkhlZFhbiZIRRBo8gODIKLo73Tg6p?=
 =?us-ascii?Q?PXgrkEkxctrrhzRgJ9VHYZhBHrcNzdKuPc8uLTMKxsrpxTDczLI63SByWeUI?=
 =?us-ascii?Q?3SB/AP0cY45SXlQ87IIiWyP6lZH/N2i0e4gLDH+slwucIRgu5/tZi6B/sQHN?=
 =?us-ascii?Q?dcZlnN73V/w+Hn/h6utL35JhdFQLQk2Eb7M51/tmvB6uZ2fm03LlPnuIGUMJ?=
 =?us-ascii?Q?AgEbb5D+CrVoml0GVL0w0bmmCGe1O/NyjvauOwzNjY4aYxUEr0tCM5Yt0Pix?=
 =?us-ascii?Q?7oxgtEpNafwHO0/aApfRkSsYfvZQm/1WSyMej5PwsHmTE/zDmTu9ujljgJWb?=
 =?us-ascii?Q?STdt9GF+sHwtbeLCykuFQOGARmbcgZZsFLK0gtLCqST5EBifz/S49ASu9yfb?=
 =?us-ascii?Q?QFlHrD7ZNeCcmi7V7JBDJet8vdaYW6ESd6MnPM+m2mt4bFVAbZINbHrcILJp?=
 =?us-ascii?Q?Mb9W554n7r9BaaQeFOGjNidHEvOE327fGOHUkGphEOcjSFUX8mKJ6r4Gnloe?=
 =?us-ascii?Q?42nPnVBZUdpiJjD0gjy912SsAz71/Vx6C9OaRjiS3LpgiLo+6GpeVLMJPXTy?=
 =?us-ascii?Q?wgGElYFgpHSJC85E9bSPAnFpg35u32JS+N5FX/IEYAfDUE9WbzzLjHaGwuCv?=
 =?us-ascii?Q?/GEMt36E1i4+f3ElIWeanOCWSmq/9cab2AhO/J0mFSJhXXQ369eWW85tn4Vw?=
 =?us-ascii?Q?shYxMIYcYe6jNc8tYsCOvt5zyEI32xiMxt5+D3+XLpLx1S1YZqLB7b+asFu0?=
 =?us-ascii?Q?xxlPz2Nr7oVFOCReLHx6bI5TBgr4u9sxshOA4Uuj1ymAGWrC1qwg6GZsVFnV?=
 =?us-ascii?Q?SIcAWE7XOfs7dZuS3MPhKUe933HntlSaQBIJh0C9x88X4xT8jK4s+wIKYaTo?=
 =?us-ascii?Q?5ukxgrnJgEgtnibuVlq3QJ3xoTAmnnTm4mnQW/WkR9UAJ7JOF2mx+H+wqFec?=
 =?us-ascii?Q?tuzzkRglz5DJl5dtv4IV2IRxGnZJB+GDYEXbvOM5cRzvDcqw1ef8ySA4lIKs?=
 =?us-ascii?Q?G67kZinLLE1o4mwKYTP1JkIH6q3uPRWZcPrQ7OMKT5DHBWUjrMDiPczWYGfL?=
 =?us-ascii?Q?pEF6B54tLcpuRFPNndrInQmcMsGXDTEVjyCtfgwJwjQ3BoiBgUU3ZQ02mdG0?=
 =?us-ascii?Q?6Rc+0/wj7lKzOfbCFp4gWN3bgVLy+OctSMkd9jTQqDKEOG6/os74hyi1XY9B?=
 =?us-ascii?Q?DSZg2/SGwDAJ1N1aF4TgSmEWTZaO80BiMaLQJCKd26Y11/vW1GbqUhYqqbiZ?=
 =?us-ascii?Q?IZK6KxYaHuhyfs0aVjTB6Z0X5vSLZtyu+N5gjK9r?=
X-MS-Exchange-CrossTenant-Network-Message-Id: adaccdc7-9de1-407d-824a-08dafc8eaa2a
X-MS-Exchange-CrossTenant-AuthSource: MN0PR11MB6206.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jan 2023 15:38:09.9604
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: 1fMnzoaXuZ99ZKKethXi1zyAoVTXj6LsylkHkl5tv+eqmUoEyq9eZakq2R0wc+UcRiT/CySA0Oh1E8koxXP3+Q==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR11MB6839
X-OriginatorOrg: intel.com
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On 2023-01-20 at 17:09:28 +0800, Yicong Yang wrote:
> On 2023/1/20 0:11, Chen Yu wrote:
> > Hi Yicong,
> > On 2023-01-17 at 10:53:25 +0800, Yicong Yang wrote:
> >> Hi Chen Yu,
> >>
> >> On 2022/12/16 14:08, Chen Yu wrote:
> >>> The main purpose of this change is to avoid too many cross CPU
> >>> wake up when it is unnecessary. The frequent cross CPU wake up
> >>> brings significant damage to some workloads, especially on high
> >>> core count systems.
> >>>
> >>> This patch set inhibits the cross CPU wake-up by placing the wakee
> >>> on waking CPU or previous CPU, if both the waker and wakee are
> >>> short-duration tasks.
> >>>
> >>> The first patch is to introduce the definition of a short-duration
> >>> task. The second patch leverages the first patch to choose a local
> >>> or previous CPU for wakee.
> >>>
> >>
> >> Tested with tbench and netperf locally and MySQL remotely. Unluckily
> >> cannot reproduce the improvement and see some regression.
> > Thank you for the test.
> >> Detailed information below. The tests are done based on 6.2-rc1 on a 2x64 CPUs
> >> Kunpeng 920 server with 4 nodes and no SMT, CONFIG_SCHED_CLUSTER
> >> enabled.
> >>
> >> For tbench and netperf tested on single node and two nodes on one socket.
> >>
> > Does this platform have 2 sockets, each socket has 2 Numa nodes, each node
> > is attached to 32 CPUs, and the benchmarks are bound to the first sockets?
> > And may I know how many CPUs there are in one LLC? Is it also 32?
> 
> you're right, exactly. There're 32 CPUs sharing one LLC.
> 
> >> Further looked into 64 threads since it regress most and mainly looked on the
> >> server(mysqld) side. In this case most loads will be on node 0 and partly
> >> on node 1. With SIS_SHORT the utilization on node 0 keeps almost the same
> >> but utilization on node 1 remains nearly half comparing to baseline. That
> >> may partly answers why the performance decreases.
> >>
> > OK, I see. So it seems that the Numa sched domain load balance does not spread
> > tasks fast enough while SIS_SHORT is waking task on the same node frequently.
> > But I thought select_idle_sibling() would wake up the tasks
> > on the same node(LLC) anyway, why SIS_SHORT inhibits the load balance more?
> 
> Wakeup will happen much more frequently than load balance in this case and I don't
> think load balance can handle it in time. In the fast path of wakeup we care little
> about the load. SIS_SHORT may aggravate it since we're likely to put 2 short tasks
> on one single CPU.
>
I see. Suppose cpu0 ~ cpu31 are on node0, cpu32~cpu64 are on node1. With SIS_SHORT
enabled, wakees could be stacked on cpu0. With SIS_SHORT disabled, wakees could be
woken up on cpu0~cpu31. I undertsnad that SIS_SHORT inhits searching for idle CPUs
in node0, but why SIS_SHORT inhibits tasks migrating to node1?
> >> mpstat 60s, non-idle%
> >> 	vanilla	sis_short	
> >> node 0	94.25	91.67	-2.73%
> >> node 1	46.41	30.03	-35.29%
> >>
> >> Previously there's argument that sync wakeup from interrupts maybe incorrectly
> > I see. Do you mean, wakeup from interrupt might cause tasks stacking on the same
> > CPU, because the interrupt is delivered to the same CPU? I thought userspace
> > irq load balance would spread the interrupt? Or do you mean others?
> 
> Nop. I'm using HiSilicon HNS3 network card which has 32 queues and 33 interrupts
> spread evenly on 32 CPUs, not on one single CPU. I considering a case that the p1
> on cpu0 and p2 on cpu32, interrupt happens on cpu0 and tries to wakeup p1, since
> p1 and p2 are both short tasks and then p2 will likely to wake and wait on cpu0.
> p1 is not the actual waker and has not finished yet and this will increase the wait
> time and also load on cpu0. Previously we may wake on the LLC of cpu0 and try
> to find an idle CPU, with SIS_SHORT we'll just wake on cpu0.
> 
> Does it make sense to allow the SIS_SHORT wakeup only from the task context? I'll
> have a try on this.
> 
This sounds reasonable to me. I think we can further enhance it.
And before you sending out the proposal, could you help test the following
experimental change, to see if it makes tbench netperf and MySQL better?

Hi Prateek, could you also help check if below change would make the Spec regression
go away?

thanks,
Chenyu

diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index fc8a636eca5e..6e1ab5e2686c 100644
--- a/kernel/sched/fair.c
+++ b/kernel/sched/fair.c
@@ -4974,7 +4974,7 @@ wakeup_preempt_entity(struct sched_entity *curr, struct sched_entity *se);
 static inline int is_short_task(struct task_struct *p)
 {
 	return sched_feat(SIS_SHORT) && p->se.dur_avg &&
-		((p->se.dur_avg * 8) <= sysctl_sched_min_granularity);
+		((p->se.dur_avg * 1024) <= (__this_cpu_read(sd_llc_size) * sysctl_sched_min_granularity));
 }
 
 /*
-- 
2.25.1