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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id r11-20020adff70b000000b002bdf290efdasm18672703wrp.58.2023.01.22.18.31.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Jan 2023 18:31:31 -0800 (PST) From: Bryan O'Donoghue To: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, djakov@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: bryan.odonoghue@linaro.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, benl@squareup.com, shawn.guo@linaro.org, fabien.parent@linaro.org, leo.yan@linaro.org, dmitry.baryshkov@linaro.org, stephan@gerhold.net Subject: [PATCH v4 1/6] dt-bindings: clock: msm8939: Move msm8939 to a distinct yaml file Date: Mon, 23 Jan 2023 02:31:22 +0000 Message-Id: <20230123023127.1186619-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230123023127.1186619-1-bryan.odonoghue@linaro.org> References: <20230123023127.1186619-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The MSM8939 has two DSI controllers as opposed to the MSM8916 which has one. As a consequence we need to document some additional clocks provided by the MSM8939 GCC which are not provided by MSM8916. Move the declaration of the MSM8939 super-set of clocks to an MSM8939 specific yaml file. Signed-off-by: Bryan O'Donoghue --- .../bindings/clock/qcom,gcc-msm8916.yaml | 7 +- .../bindings/clock/qcom,gcc-msm8939.yaml | 87 +++++++++++++++++++ 2 files changed, 89 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-msm8939.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml index ad84c0f7680be..016d310be3c83 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8916.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm Global Clock & Reset Controller on MSM8916 and MSM8939 +title: Qualcomm Global Clock & Reset Controller on MSM8916. maintainers: - Stephen Boyd @@ -12,19 +12,16 @@ maintainers: description: | Qualcomm global clock control module provides the clocks, resets and power - domains on MSM8916 or MSM8939. + domains on MSM8916. See also:: include/dt-bindings/clock/qcom,gcc-msm8916.h - include/dt-bindings/clock/qcom,gcc-msm8939.h include/dt-bindings/reset/qcom,gcc-msm8916.h - include/dt-bindings/reset/qcom,gcc-msm8939.h properties: compatible: enum: - qcom,gcc-msm8916 - - qcom,gcc-msm8939 clocks: items: diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8939.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8939.yaml new file mode 100644 index 0000000000000..92a811d6ad97b --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8939.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8939.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller on MSM8939. + +maintainers: + - Bryan O'Donoghue + +description: | + Qualcomm global clock control module provides the clocks, resets and power + domains on MSM8939. + + See also:: + include/dt-bindings/clock/qcom,gcc-msm8939.h + include/dt-bindings/reset/qcom,gcc-msm8939.h + +properties: + compatible: + enum: + - qcom,gcc-msm8939 + + clocks: + items: + - description: XO source + - description: Sleep clock source + - description: DSI phy instance 0 dsi clock + - description: DSI phy instance 0 byte clock + - description: DSI phy instance 1 dsi clock + - description: DSI phy instance 1 byte clock + - description: External MCLK clock + - description: External Primary I2S clock + - description: External Secondary I2S clock + + clock-names: + items: + - const: xo + - const: sleep_clk + - const: dsi0pll + - const: dsi0pllbyte + - const: dsi1pll + - const: dsi1pllbyte + - const: ext_mclk + - const: ext_pri_i2s + - const: ext_sec_i2s + +required: + - compatible + - clocks + - clock-names + +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + clock-controller@1800000 { + compatible = "qcom,gcc-msm8939"; + reg = <0x01800000 0x80000>; + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&sleep_clk>, + <&dsi_phy0 1>, + <&dsi_phy0 0>, + <&dsi_phy1 1>, + <&dsi_phy1 0>, + <0>, + <0>, + <0>; + clock-names = "xo", + "sleep_clk", + "dsi0pll", + "dsi0pllbyte", + "dsi1pll", + "dsi1pllbyte", + "ext_mclk", + "ext_pri_i2s", + "ext_sec_i2s"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... -- 2.38.1