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[83.9.31.109]) by smtp.gmail.com with ESMTPSA id w1-20020a170906480100b0080c433a9eeesm637395ejq.182.2023.01.24.01.46.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 24 Jan 2023 01:47:01 -0800 (PST) Message-ID: <675ed9f7-da31-6206-5089-1db22025ef4b@linaro.org> Date: Tue, 24 Jan 2023 10:46:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.0 Subject: Re: [PATCH 6/7] arm64: dts: Add ipq9574 SoC and AL02 board support To: Devi Priya , Krzysztof Kozlowski , agross@kernel.org, andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, linus.walleij@linaro.org, catalin.marinas@arm.com, will@kernel.org, p.zabel@pengutronix.de, shawnguo@kernel.org, arnd@arndb.de, marcel.ziswiler@toradex.com, dmitry.baryshkov@linaro.org, nfraprado@collabora.com, broonie@kernel.org, tdas@codeaurora.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: quic_srichara@quicinc.com, quic_gokulsri@quicinc.com, quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com, quic_arajkuma@quicinc.com, quic_anusha@quicinc.com, quic_poovendh@quicinc.com References: <20230110121316.24892-1-quic_devipriy@quicinc.com> <20230110121316.24892-7-quic_devipriy@quicinc.com> <7f157b73-f856-04d2-1b39-e1f8861d0439@quicinc.com> <84aa79c3-b793-0d0e-d6a5-035aff5a17b4@linaro.org> <278a2e6e-69e0-81b0-f476-571edea950ff@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <278a2e6e-69e0-81b0-f476-571edea950ff@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 24.01.2023 08:19, Devi Priya wrote: > > > On 1/13/2023 7:50 PM, Krzysztof Kozlowski wrote: >> On 13/01/2023 14:29, Devi Priya wrote: >>>>> + >>>>> +    soc: soc@0 { >>>>> +        #address-cells = <1>; >>>>> +        #size-cells = <1>; >>>>> +        ranges = <0 0 0 0xffffffff>; >>>>> +        compatible = "simple-bus"; >>>>> + >>>>> +        tlmm: pinctrl@1000000 { >>>>> +            compatible = "qcom,ipq9574-tlmm"; >>>>> +            reg = <0x01000000 0x300000>; >>>>> +            interrupts = ; >>>>> +            gpio-controller; >>>>> +            #gpio-cells = <2>; >>>>> +            gpio-ranges = <&tlmm 0 0 65>; >>>>> +            gpio-reserved-ranges = <59 1>; >>>> >>>> Hm, why reserved ranges are in SoC? >>> As the gpio is forbidden on all ipq9574 boards, we have added it in SoC >> >> Why it is forbidden on all boards? I guess it depends on the firmware >> and this can differ, can't it? >> > This GPIO is protected and used by the TZ firmware and is forbidden on all the boards & firmware If it's protected on *all* boards and *all* firmwares (for any good reason that you probably have internally), perhaps it would be better to describe it in the .c driver.. wdyt? Konrad >> Best regards, >> Krzysztof >> > Regards, > Devi Priya