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[83.9.31.109]) by smtp.gmail.com with ESMTPSA id j15-20020aa7de8f000000b0049622a61f8fsm840057edv.30.2023.01.24.01.53.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 24 Jan 2023 01:53:39 -0800 (PST) Message-ID: Date: Tue, 24 Jan 2023 10:53:35 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.0 Subject: Re: [PATCH 2/7] clk: qcom: Add Global Clock Controller driver for IPQ9574 Content-Language: en-US To: Devi Priya , agross@kernel.org, andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, linus.walleij@linaro.org, catalin.marinas@arm.com, will@kernel.org, p.zabel@pengutronix.de, shawnguo@kernel.org, arnd@arndb.de, marcel.ziswiler@toradex.com, dmitry.baryshkov@linaro.org, nfraprado@collabora.com, broonie@kernel.org, tdas@codeaurora.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: quic_srichara@quicinc.com, quic_gokulsri@quicinc.com, quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com, quic_arajkuma@quicinc.com, quic_anusha@quicinc.com, quic_poovendh@quicinc.com References: <20230110121316.24892-1-quic_devipriy@quicinc.com> <20230110121316.24892-3-quic_devipriy@quicinc.com> <9bdf757d-1fa0-106f-eb77-7f2a8593213f@linaro.org> <2852fc37-284f-6534-f163-45b37b153db1@quicinc.com> From: Konrad Dybcio In-Reply-To: <2852fc37-284f-6534-f163-45b37b153db1@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 24.01.2023 08:27, Devi Priya wrote: > > > On 1/13/2023 7:39 PM, Konrad Dybcio wrote: >> >> >> On 13.01.2023 14:21, Devi Priya wrote: >>> >>> >>> On 1/10/2023 6:07 PM, Konrad Dybcio wrote: >>>> >>>> >>>> On 10.01.2023 13:13, devi priya wrote: >>>>> Add Global Clock Controller (GCC) driver for ipq9574 based devices >>>>> >>>>> Co-developed-by: Anusha Rao >>>>> Signed-off-by: Anusha Rao >>>>> Signed-off-by: devi priya >>>>> --- >> [...] >> >>>>> +static struct clk_branch gcc_blsp1_qup6_i2c_apps_clk = { >>>>> +    .halt_reg = 0x07024, >>>>> +    .clkr = { >>>>> +        .enable_reg = 0x07024, >>>>> +        .enable_mask = BIT(0), >>>>> +        .hw.init = &(struct clk_init_data) { >>>>> +            .name = "gcc_blsp1_qup6_i2c_apps_clk", >>>>> +            .parent_hws = (const struct clk_hw *[]) { >>>>> +                    &blsp1_qup6_i2c_apps_clk_src.clkr.hw }, >>>>> +            .num_parents = 1, >>>>> +            .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, >>>> Sounds very much like a hack.. >>> Got it, will remove the clock entry as it is not being used in linux >> I'm not sure removing it is the best option, somebody might have a >> funky board where they use this particular QUP for I2C for whatever >> reason and then the clock would have to be re-added.. > Sure, Understood > This clock is used by the RPM component to communicate with PMIC and we > would add the critical flag here Okay, so this SoC is intended to ship with some RPM PMICs and *always* with an I2C companion that's required for some basic functionality, correct? Otherwise, if it's just for wifi/multimedia/etc (like PM8008ij on some newer devices), you should not make it critical and simply rely on Linux keeping it alive like so: consumer takes a regulator the regulator does not go to sleep because it's consumed the PMIC is active because a regulator on it is being used the I2C bus is active because its child PMIC is used the I2C clocks are alive because there's an active user Konrad > >> Thanks for addressing all of the review comments so thoroughly! >> >> Konrad > > Best Regards, > Devi Priya