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Tue, 24 Jan 2023 04:24:50 -0800 (PST) Received: from [192.168.1.109] ([178.197.216.144]) by smtp.gmail.com with ESMTPSA id k16-20020a7bc410000000b003d99469ece1sm13200111wmi.24.2023.01.24.04.24.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 24 Jan 2023 04:24:50 -0800 (PST) Message-ID: <81f80190-a05c-5d0d-11b2-a80573b86e1c@linaro.org> Date: Tue, 24 Jan 2023 13:24:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.0 Subject: Re: [PATCH v3 05/10] dt-bindings: soc: fsl: cpm_qe: Add QMC controller Content-Language: en-US To: Herve Codina Cc: Li Yang , Rob Herring , Krzysztof Kozlowski , Liam Girdwood , Mark Brown , Christophe Leroy , Michael Ellerman , Nicholas Piggin , Qiang Zhao , Jaroslav Kysela , Takashi Iwai , Shengjiu Wang , Xiubo Li , Fabio Estevam , Nicolin Chen , linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, Thomas Petazzoni References: <20230113103759.327698-1-herve.codina@bootlin.com> <20230113103759.327698-6-herve.codina@bootlin.com> <316ddb81-8d13-71dd-3396-412e31cfb880@linaro.org> <20230124104232.183cc9ff@bootlin.com> <37a95380-ee68-5c3a-3b96-48cc8b525f19@linaro.org> <20230124122347.1a531d0f@bootlin.com> From: Krzysztof Kozlowski In-Reply-To: <20230124122347.1a531d0f@bootlin.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 24/01/2023 12:23, Herve Codina wrote: > On Tue, 24 Jan 2023 11:02:52 +0100 > Krzysztof Kozlowski wrote: > >> On 24/01/2023 10:42, Herve Codina wrote: >>> Hi Krzysztof, >>> >>> On Tue, 17 Jan 2023 12:31:09 +0100 >>> Krzysztof Kozlowski wrote: >>> >>>> On 13/01/2023 11:37, Herve Codina wrote: >>>>> Add support for the QMC (QUICC Multichannel Controller) >>>>> available in some PowerQUICC SoC such as MPC885 or MPC866. >>>>> >>>>> Signed-off-by: Herve Codina >>>>> --- >>>>> .../bindings/soc/fsl/cpm_qe/fsl,qmc.yaml | 164 ++++++++++++++++++ >>>>> 1 file changed, 164 insertions(+) >>>>> create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qmc.yaml >>>>> >>>>> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qmc.yaml >>>>> new file mode 100644 >>>>> index 000000000000..3ec52f1635c8 >>>>> --- /dev/null >>>>> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qmc.yaml >>>>> @@ -0,0 +1,164 @@ >>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>>>> +%YAML 1.2 >>>>> +--- >>>>> +$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qmc.yaml# >>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>>> + >>>>> +title: PowerQUICC CPM QUICC Multichannel Controller (QMC) >>>>> + >>>>> +maintainers: >>>>> + - Herve Codina >>>>> + >>>>> +description: | >>>>> + The QMC (QUICC Multichannel Controller) emulates up to 64 channels within >>>>> + one serial controller using the same TDM physical interface routed from >>>>> + TSA. >>>>> + >>>>> +properties: >>>>> + compatible: >>>>> + items: >>>>> + - enum: >>>>> + - fsl,mpc885-scc-qmc >>>>> + - fsl,mpc866-scc-qmc >>>>> + - const: fsl,cpm1-scc-qmc >>>>> + >>>>> + reg: >>>>> + items: >>>>> + - description: SCC (Serial communication controller) register base >>>>> + - description: SCC parameter ram base >>>>> + - description: Dual port ram base >>>>> + >>>>> + reg-names: >>>>> + items: >>>>> + - const: scc_regs >>>>> + - const: scc_pram >>>>> + - const: dpram >>>>> + >>>>> + interrupts: >>>>> + maxItems: 1 >>>>> + description: SCC interrupt line in the CPM interrupt controller >>>>> + >>>>> + fsl,tsa: >>>>> + $ref: /schemas/types.yaml#/definitions/phandle >>>>> + description: phandle to the TSA >>>>> + >>>>> + fsl,tsa-cell-id: >>>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>>> + enum: [1, 2, 3] >>>>> + description: | >>>>> + TSA cell ID (dt-bindings/soc/fsl,tsa.h defines these values) >>>>> + - 1: SCC2 >>>>> + - 2: SCC3 >>>>> + - 3: SCC4 >>>> >>>> Is this used as argument to tsa? If so, this should be part of fsl,tsa >>>> property, just like we do for all syscon-like phandles. >>> >>> Yes, indeed. >>> I will move 'fsl,tsa' to 'fsl,tsa-cell' with 'fsl,tsa-cell' a phandle/number >>> pair (the phandle to TSA node and the TSA cell id to use) >> >> Move to fsl,tsa, not from. > > Well, I plan to remove both fsl,tsa and fsl,tsa-cell-id and use this: > fsl,tsa-cell: > $ref: /schemas/types.yaml#/definitions/phandle-array > items: > - items: > - description: phandle to TSA node > - enum: [1, 2, 3] > description: | > TSA cell ID (dt-bindings/soc/fsl,tsa.h defines these values) > - 1: SCC2 > - 2: SCC3 > - 3: SCC4 > description: > Should be a phandle/number pair. The phandle to TSA node and the TSA > cell ID to use. > > Is that what you were thinking about ? Yes, except again, so third time, why calling this "cell"? Move it to fsl,tsa. Best regards, Krzysztof