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[195.132.213.62]) by smtp.gmail.com with ESMTPSA id bd25-20020a05600c1f1900b003dafa04ecc4sm105977wmb.6.2023.01.24.14.27.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 24 Jan 2023 14:27:41 -0800 (PST) Message-ID: <0b5e3a14-fd23-4646-d4cb-df255eb8fa20@baylibre.com> Date: Tue, 24 Jan 2023 23:27:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.0 Subject: Re: [PATCH v7 4/4] thermal: mediatek: add another get_temp ops for thermal sensors Content-Language: en-US To: Daniel Lezcano , "Rafael J. Wysocki" , Amit Kucheria , Rob Herring , Krzysztof Kozlowski , Zhang Rui Cc: AngeloGioacchino Del Regno , Fabien Parent , Matthias Brugger , Markus Schneider-Pargmann , linux-pm@vger.kernel.org, Rob Herring , Michael Kao , linux-kernel@vger.kernel.org, Hsin-Yi Wang , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org References: <20221018-up-i350-thermal-bringup-v7-0-ebf08ff2eddb@baylibre.com> <20221018-up-i350-thermal-bringup-v7-4-ebf08ff2eddb@baylibre.com> <4121bb6b-30db-7a23-f4c8-40afdda7a0b5@linaro.org> <0644aede-c281-3919-50e0-4466f6587d81@linaro.org> <187b0fe1-1f14-d8b8-c827-1e824da0b1d3@baylibre.com> <9f9547a2-69dd-f91d-c587-289156bf9d55@linaro.org> <2950b824-ad2f-2579-a956-a03d157453eb@baylibre.com> From: Amjad Ouled-Ameur In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/24/23 18:55, Daniel Lezcano wrote: > On 24/01/2023 18:46, Amjad Ouled-Ameur wrote: >> >> On 1/24/23 17:54, Daniel Lezcano wrote: >>> >>> Hi Amjad, >>> >>> On 24/01/2023 11:08, Amjad Ouled-Ameur wrote: >>> >>> [ ... ] >>> >>>>>> >>>>>> IIUC, there is a sensor per couple of cores. 1 x 2Bigs, 1 x 2Bigs, 1 x 4 Little, right ? >>>>> >>>>> MT8365 SoC has 4 x A53 CPUs. The SoC has 4 thermal zones per sensor. Thermal zone 0 corresponds >>>>> >>>>> to all 4 x A53 CPUs, the other thermal zones (1, 2 and 3) has nothing to do with CPUs. The cooling device type >>>>> >>>>> used for CPUs is passive. FYI, thermal zones 1, 2 and 3 are present in the SoC for debug-purpose only, they are not supposed >>>>> >>>>> to be used for production. >>>>> >>>> After reconsidering the fact that zones 1, 2 and 3 are only used for dev/debug, it might be best to avo > >>>> aggregation as you suggested, and keep only support for zone 0 in this driver. Thus I suggest I send a V8 >>>> >>>> where I keep only below fixes for this patch if that's okay with you: >>>> >>>> - Define "raw_to_mcelsius" function pointer for "struct thermal_bank_cfg". >>>> >>>> - Fix "mtk_thermal" variable in mtk_read_temp(). >>>> >>>> - Set "mt->raw_to_mcelsius" in probe(). >>>> >>>> >>>> For zones 1, 2 and 3 we can later add a different driver specific for dev/debug to probe them to >>>> >>>> avoid confusion. >>> >>> You can add them in the driver and in the device tree, but just add the cooling device for the thermal zone 0. >> >> Thermal zone 0 uses CPU{0..3} for passive cooling, in this case we should register cooling device with >> >> cpufreq_cooling_register() for each CPU right ? > > No, the OF code device tree does already that. You just have to register the different thermal zones. > > Do you have a pointer to a device tree for this board and the thermal setup ? Sure, here is a dtsi for MT8365 SoC which contains thermal nodes [0]. [0]: https://lore.kernel.org/linux-arm-kernel/20220531135026.238475-17-fparent@baylibre.com/#Z31arch:arm64:boot:dts:mediatek:mt8365.dtsi > >