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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id r141-20020a4a3793000000b0050dc3c2f77asm2201809oor.8.2023.01.25.12.22.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Jan 2023 12:22:16 -0800 (PST) Received: (nullmailer pid 2846936 invoked by uid 1000); Wed, 25 Jan 2023 20:22:15 -0000 Date: Wed, 25 Jan 2023 14:22:15 -0600 From: Rob Herring To: Etienne Carriere , Sudeep Holla Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Jens Wiklander , Krzysztof Kozlowski , Marc Zyngier , Sumit Garg , Pascal Paillet Subject: Re: [PATCH v2 1/3] dt-bindings: arm: optee: add interrupt controller properties Message-ID: <20230125202215.GA2811928-robh@kernel.org> References: <20230124105643.1737250-1-etienne.carriere@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230124105643.1737250-1-etienne.carriere@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org +Sudeep On Tue, Jan 24, 2023 at 11:56:41AM +0100, Etienne Carriere wrote: > Adds an optional interrupt controller property to optee firmware node > in the DT bindings. Optee driver may embeds an irqchip exposing > interrupts notified by the TEE world. Optee registers up to 1 interrupt > controller and identifies each line with a line number from 0 to > UINT16_MAX. > > In the example, the platform SCMI device uses optee interrupt irq 5 > as async signal to trigger processing of an async incoming SCMI message, > in the scope of a CPU DVFS control. A platform can have several SCMI > channels driven this way. Optee irqs also permits small embedded devices > to share e.g. a gpio expander, a group of wakeup sources, etc... between > OP-TEE world (for sensitive services) and Linux world (for non-sensitive > services). The physical controller is driven from the TEE which exposes > some controls to Linux kernel. > > Cc: Jens Wiklander > Cc: Krzysztof Kozlowski > Cc: Marc Zyngier > Cc: Rob Herring > Cc: Sumit Garg > > Co-developed-by: Pascal Paillet > Signed-off-by: Pascal Paillet > Signed-off-by: Etienne Carriere > --- > Changes since v1: > - Added a description to #interrupt-cells property. > - Changed of example. Linux wakeup event was subject to discussion and > i don't know much about input events in Linux. So move to SCMI. > In the example, an SCMI server in OP-TEE world raises optee irq 5 > so that Linux scmi optee channel &scmi_cpu_dvfs pushed in the incoming > SCMI message in the scmi device for liekly later processing in threaded > context. The example includes all parties: optee, scmi, sram, gic. > - Obviously rephrased the commit message. > - Added Cc: tags > --- > .../arm/firmware/linaro,optee-tz.yaml | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml > index d4dc0749f9fd..9c00c27f8b2c 100644 > --- a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml > +++ b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml > @@ -40,6 +40,14 @@ properties: > HVC #0, register assignments > register assignments are specified in drivers/tee/optee/optee_smc.h > > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 1 > + description: | > + OP-TEE exposes irq for irp chip controllers from OP-TEE world. Each > + irq is assigned a single line number identifier used as first argument. > + > required: > - compatible > - method > @@ -64,3 +72,62 @@ examples: > method = "hvc"; > }; > }; > + > + - | > + #include > + firmware { > + optee: optee { > + compatible = "linaro,optee-tz"; > + method = "smc"; > + interrupts = ; > + interrupt-controller; > + #interrupt-cells = <1>; > + }; > + > + scmi { > + compatible = "linaro,scmi-optee"; > + linaro,optee-channel-id = <0>; > + interrupt-parent = <&gic>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + scmi_cpu_dvfs: protocol@13 { > + reg = <0x13>; > + linaro,optee-channel-id = <1>; > + shmem = <&scmi_shm_tx>, <&scmi_shm_rx>; > + interrupts-extended = <&optee 5>; > + interrupt-names = "a2p"; These properties aren't documented. Soon there will be a warning[1]. > + #clock-cells = <1>; > + }; > + }; > + }; > + > + gic: interrupt-controller@a0021000 { > + compatible = "arm,cortex-a7-gic"; > + reg = <0xa0021000 0x1000>, <0xa0022000 0x2000>; > + interrupt-controller; > + #interrupt-cells = <3>; > + }; > + > + soc { > + #address-cells = <1>; > + #size-cells = <1>; > + > + sram@2ffff000 { > + compatible = "mmio-sram"; > + reg = <0x2ffff000 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x2ffff000 0x1000>; > + > + scmi_shm_tx: scmi-sram@0 { > + compatible = "arm,scmi-shmem"; > + reg = <0 0x80>; > + }; > + > + scmi_shm_rx: scmi-sram@100 { > + compatible = "arm,scmi-shmem"; > + reg = <0x100 0x80>; > + }; There's no need to show providers in examples (unless the example is for the provider). Rob