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Thu, 26 Jan 2023 02:34:26 -0800 (PST) MIME-Version: 1.0 References: <20230124131717.128660-1-bchihi@baylibre.com> <20230124131717.128660-3-bchihi@baylibre.com> <20230125203420.GA2855708-robh@kernel.org> In-Reply-To: <20230125203420.GA2855708-robh@kernel.org> From: Balsam CHIHI Date: Thu, 26 Jan 2023 11:33:50 +0100 Message-ID: Subject: Re: [PATCH v11 2/6] dt-bindings/thermal/mediatek: Add LVTS thermal controllers dt-binding definition To: Rob Herring Cc: daniel.lezcano@linaro.org, angelogioacchino.delregno@collabora.com, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com, krzysztof.kozlowski+dt@linaro.org, rdunlap@infradead.org, ye.xingchen@zte.com.cn, p.zabel@pengutronix.de, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, khilman@baylibre.com, james.lo@mediatek.com, rex-bc.chen@mediatek.com Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On Wed, Jan 25, 2023 at 9:34 PM Rob Herring wrote: > > On Tue, Jan 24, 2023 at 02:17:13PM +0100, bchihi@baylibre.com wrote: > > From: Balsam CHIHI > > > > dt-bindings: thermal: ... for the subject I will fix it. > > > Add LVTS thermal controllers dt-binding definition for mt8195. > > > > Signed-off-by: Balsam CHIHI > > --- > > .../thermal/mediatek,lvts-thermal.yaml | 107 ++++++++++++++++++ > > include/dt-bindings/thermal/mediatek-lvts.h | 19 ++++ > > 2 files changed, 126 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > > create mode 100644 include/dt-bindings/thermal/mediatek-lvts.h > > > > diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > > new file mode 100644 > > index 000000000000..12bfbdd8ff89 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml > > @@ -0,0 +1,107 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) > > + > > +maintainers: > > + - Balsam CHIHI > > + > > +description: | > > + LVTS is a thermal management architecture composed of three subsystems, > > + a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), > > + a Converter - Low Voltage Thermal Sensor converter (LVTS), and > > + a Digital controller (LVTS_CTRL). > > + > > +properties: > > + compatible: > > + enum: > > + - mediatek,mt8195-lvts-ap > > + - mediatek,mt8195-lvts-mcu > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + clocks: > > + maxItems: 1 > > + > > + resets: > > + maxItems: 1 > > + description: LVTS reset for clearing temporary data on AP/MCU. > > + > > + nvmem-cells: > > + minItems: 1 > > + items: > > + - description: Calibration eFuse data 1 for LVTS > > + - description: Calibration eFuse data 2 for LVTS > > + > > + nvmem-cell-names: > > + minItems: 1 > > + items: > > + - const: lvts-calib-data-1 > > + - const: lvts-calib-data-2 > > + > > + "#thermal-sensor-cells": > > + const: 1 > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - clocks > > + - resets > > + - nvmem-cells > > + - nvmem-cell-names > > + - "#thermal-sensor-cells" > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include > > + #include > > + #include > > + #include > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + lvts_mcu: thermal-sensor@11278000 { > > + compatible = "mediatek,mt8195-lvts-mcu"; > > + reg = <0 0x11278000 0 0x1000>; > > + interrupts = ; > > + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; > > + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; > > + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; > > + nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2"; > > + #thermal-sensor-cells = <1>; > > + }; > > + }; > > + > > + thermal_zones: thermal-zones { > > + cpu0-thermal { > > + polling-delay = <1000>; > > + polling-delay-passive = <250>; > > + thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>; > > + > > + trips { > > + cpu0_alert: trip-alert { > > + temperature = <85000>; > > + hysteresis = <2000>; > > + type = "passive"; > > + }; > > + > > + cpu0_crit: trip-crit { > > + temperature = <100000>; > > + hysteresis = <2000>; > > + type = "critical"; > > + }; > > + }; > > + }; > > + }; > > diff --git a/include/dt-bindings/thermal/mediatek-lvts.h b/include/dt-bindings/thermal/mediatek-lvts.h > > new file mode 100644 > > index 000000000000..428a95c18509 > > --- /dev/null > > +++ b/include/dt-bindings/thermal/mediatek-lvts.h > > @@ -0,0 +1,19 @@ > > +/* SPDX-License-Identifier: GPL-2.0+ */ > > Okay with GPL 4? GPL-2.0-only > > Dual license please. Consistent with your .dts files. I will fix this too. > > > +/* > > + * Copyright (c) 2023 MediaTek Inc. > > + * Author: Balsam CHIHI > > + */ > > + > > +#ifndef __MEDIATEK_LVTS_DT_H > > +#define __MEDIATEK_LVTS_DT_H > > + > > +#define MT8195_MCU_BIG_CPU0 0 > > +#define MT8195_MCU_BIG_CPU1 1 > > +#define MT8195_MCU_BIG_CPU2 2 > > +#define MT8195_MCU_BIG_CPU3 3 > > +#define MT8195_MCU_LITTLE_CPU0 4 > > +#define MT8195_MCU_LITTLE_CPU1 5 > > +#define MT8195_MCU_LITTLE_CPU2 6 > > +#define MT8195_MCU_LITTLE_CPU3 7 > > + > > +#endif /* __MEDIATEK_LVTS_DT_H */ > > -- > > 2.34.1 > > Thank you for the review. Best regards, Balsam