Date:   Fri, 27 Jan 2023 02:09:20 +0000
From:   Sean Christopherson <seanjc@google.com>
To:     Like Xu <like.xu.linux@gmail.com>
Cc:     Paolo Bonzini <pbonzini@redhat.com>, kvm@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/8] KVM: VMX: Refactor intel_pmu_set_msr() to align
 with other set_msr() helpers
Message-ID: <Y9MyUHhIRtImjoyd@google.com>
References: <20221111102645.82001-1-likexu@tencent.com>
 <20221111102645.82001-3-likexu@tencent.com>
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On Fri, Nov 11, 2022, Like Xu wrote:
> From: Sean Christopherson <seanjc@google.com>
> 
> Invert the flows in intel_pmu_set_msr()'s case statements so that they
> follow the kernel's preferred style of:
> 
> 	if (<not valid>)
> 		return <error>
> 
> 	<commit change>
> 	return <success>
> 
> which is also the style used by every other set_msr() helper (except
> AMD's PMU variant, which doesn't use a switch statement).
> 
> Opportunstically move the "val == current" checks below the validity
> checks.  Except for the one-off case for MSR_P6_EVNTSEL2, the reserved
> bit checks are extremely cheap, and the guest is unlikely to frequently
> write the current value, i.e. avoiding the reserved bit checks doesn't
> add much (any?) value.
> 
> No functional change intended.
> 
> Signed-off-by: Sean Christopherson <seanjc@google.com>

FYI, I'm going to post this separately and extend it to give the get_msr() flow
the same treatment.  I'll plan on getting it queued sooner than later so that
this series can use it as a base.