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[83.9.31.20]) by smtp.gmail.com with ESMTPSA id y8-20020a056402134800b004610899742asm2410252edw.13.2023.01.27.06.49.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 27 Jan 2023 06:50:01 -0800 (PST) Message-ID: <27878e7c-b345-06e9-6e69-e9ac397a9ec1@linaro.org> Date: Fri, 27 Jan 2023 15:49:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.0 Subject: Re: [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP Content-Language: en-US To: Abel Vesa , Andy Gross , Bjorn Andersson , Sai Prakash Ranjan , Johan Hovold Cc: linux-arm-msm@vger.kernel.org, Linux Kernel Mailing List References: <20230127144724.1292580-1-abel.vesa@linaro.org> From: Konrad Dybcio In-Reply-To: <20230127144724.1292580-1-abel.vesa@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 27.01.2023 15:47, Abel Vesa wrote: > These new values are now based on the latest LLCC SC table. > > Fixes: ec69dfbdc426 ("soc: qcom: llcc: Add sc8180x and sc8280xp configurations") > Signed-off-by: Abel Vesa > --- I can't verify this, but it looks sound so: Acked-by: Konrad Dybcio Konrad > > The v1 is here: > https://lore.kernel.org/all/20230126171636.2319496-1-abel.vesa@linaro.org/ > > Changes since v1: > * dropped the LLCC_GPU and LLCC_WRCACHE max_cap changes > * took the new values from documentatio this time rather than > downstream kernel > > drivers/soc/qcom/llcc-qcom.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c > index 23ce2f78c4ed..26efe12012a0 100644 > --- a/drivers/soc/qcom/llcc-qcom.c > +++ b/drivers/soc/qcom/llcc-qcom.c > @@ -191,9 +191,9 @@ static const struct llcc_slice_config sc8280xp_data[] = { > { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 }, > { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, > - { LLCC_CVPFW, 32, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > - { LLCC_CPUSS1, 33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > - { LLCC_CPUHWT, 36, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, > + { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > + { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 }, > + { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 }, > }; > > static const struct llcc_slice_config sdm845_data[] = {