Date:   Fri, 27 Jan 2023 17:17:01 +0000
From:   Lee Jones <lee@kernel.org>
To:     POOVENDHAN SELVARAJ <quic_poovendh@quicinc.com>
Cc:     Guru Das Srinagesh <quic_gurus@quicinc.com>, agross@kernel.org,
        andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, catalin.marinas@arm.com,
        will@kernel.org, shawnguo@kernel.org, arnd@arndb.de,
        marcel.ziswiler@toradex.com, dmitry.baryshkov@linaro.org,
        nfraprado@collabora.com, broonie@kernel.org, robimarko@gmail.com,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        quic_srichara@quicinc.com, quic_gokulsri@quicinc.com,
        quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com,
        quic_arajkuma@quicinc.com, quic_anusha@quicinc.com,
        quic_devipriy@quicinc.com
Subject: Re: [PATCH 3/5] firmware: scm: Modify only the DLOAD bit in TCSR
 register for download mode
Message-ID: <Y9QHDXfpAETnCHi9@google.com>
References: <20230113160012.14893-1-quic_poovendh@quicinc.com>
 <20230113160012.14893-4-quic_poovendh@quicinc.com>
 <20230114011606.GA24659@quicinc.com>
 <659c81b0-b75e-9a6f-bd26-878bb9868397@quicinc.com>
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On Fri, 27 Jan 2023, POOVENDHAN SELVARAJ wrote:

> 
> On 1/14/2023 6:46 AM, Guru Das Srinagesh wrote:
> > On Jan 13 2023 21:30, Poovendhan Selvaraj wrote:
> > > Add support to read-modify-write TCSR register to modify only DLOAD bit.
> > Could you please add more details on what problem this patch is fixing, and why
> > this patch is needed?
> > 
> > CrashDump collection is based on the DLOAD bit of TCSR register. To retain other bits, we read the register and modify only the DLOAD bit as the other bits have their own significance.
> > 
> > Thank you.
> > 
> > Guru Das.
> > 
> > Regards,
> > Poovendhan S

Could you please fix your email client.

I have no idea which text is yours, in any of your mails.

-- 
Lee Jones [李琼斯]