From:   "Tian, Kevin" <kevin.tian@intel.com>
To:     Bjorn Helgaas <helgaas@kernel.org>,
        Lu Baolu <baolu.lu@linux.intel.com>
CC:     Bjorn Helgaas <bhelgaas@google.com>,
        "Rodel, Jorg" <jroedel@suse.de>,
        "Matt Fagnani" <matt.fagnani@bell.net>,
        =?iso-8859-1?Q?Christian_K=F6nig?= <christian.koenig@amd.com>,
        Jason Gunthorpe <jgg@nvidia.com>,
        Vasant Hegde <vasant.hegde@amd.com>,
        "Zhu, Tony" <tony.zhu@intel.com>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "iommu@lists.linux.dev" <iommu@lists.linux.dev>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v3 1/1] PCI: Add translated request only flag for
 pci_enable_pasid()
Thread-Topic: [PATCH v3 1/1] PCI: Add translated request only flag for
 pci_enable_pasid()
Thread-Index: AQHZJ+u/izID69X8S0CIgNghGwY+ma6ymkmAgADulxA=
Date:   Sat, 28 Jan 2023 07:52:07 +0000
Message-ID: <BN9PR11MB5276B53481C374BDE839824E8CCD9@BN9PR11MB5276.namprd11.prod.outlook.com>
References: <20230114073420.759989-1-baolu.lu@linux.intel.com>
 <20230127173035.GA994835@bhelgaas>
In-Reply-To: <20230127173035.GA994835@bhelgaas>
Accept-Language: en-US
Content-Language: en-US
x-ms-exchange-antispam-messagedata-chunkcount: 1
x-ms-exchange-antispam-messagedata-0: =?iso-8859-1?Q?xpCu0NOC+RTgZewy1ob8wSx0wvTkV1zdFMmqPmOmlqKQ2/y5zZfijDbI3W?=
 =?iso-8859-1?Q?u41ACEPrVqDssXPPtP5qS/cHvSXQXAqRjqRA+mPOkha9eCZf46bFMl5nkc?=
 =?iso-8859-1?Q?xdWWOCenFzjoVLvIQmyTj3ZHgYnnypT+T/tkAJnOD/sgm4xaeFW3Cu9LoV?=
 =?iso-8859-1?Q?NPFb8bdl/ecW8GIh6uGi7EmY9b4RPeHXPnSJ3hX8K9UpQGp9mxKEDEgMcX?=
 =?iso-8859-1?Q?LIHIx7MSc2t+b8w2ITpkT/gEOkuRwbRUmFd2ALs7TqxmQ2/ACbGMkAJLvr?=
 =?iso-8859-1?Q?bE+CO2EAqS5dXOmnCTblfyzy8p9pw71/Zrmgvy0WqH2AG59uQad2ZJWBy0?=
 =?iso-8859-1?Q?BWUbt+6VDR3+FFgPzy7bmW395T/6igLVaqebOitHlhplhA6ZQUSSahmSBL?=
 =?iso-8859-1?Q?KnjX++4HLOT8kTIzuV/8+fH4WVXAzrX1EkKLpbc2/Fr2ivKg1H7T29ilpb?=
 =?iso-8859-1?Q?2/asNjX8S9DLZjiZuBNkODuvsvEIbdb1zVizZvCrbH/mJisZ1u8wGhg4ZE?=
 =?iso-8859-1?Q?ZOcjj0D7eXxJN7LOsM0AM+eAJW2SM+1iXiL+D4YkNT4QLEMk+ENFsak+XS?=
 =?iso-8859-1?Q?Ru0wzJodczKC6XN5p4tTfXS2mHBXA+VpGwaHbAX2C/Gn/32606Km00iJcO?=
 =?iso-8859-1?Q?N5gPmJHMM4MhaUlROk6RJd6WbIs+p92VcYNu2anICza+apJQ/sBs0ucurf?=
 =?iso-8859-1?Q?Jew3yKCNhHRj4XOL5i/azfCY529PwqV1ZGCfYAEV7ldrvPnmP4o/qw27nk?=
 =?iso-8859-1?Q?x+S1giU2sn55oZgOEfkdk7woHu7Bi5qmfNaKr6c0gOPZXwvOUdLmToNRM9?=
 =?iso-8859-1?Q?vekaBX19IW4nbD/QcMSh7g0+MKcRG6x8QxmoNOL9pZZrfUqYZI7Xuy8dei?=
 =?iso-8859-1?Q?yA2S0DDDvLpE4W2NUBREtopPtMCNf3GDq4En4cIfTBOavZZ7kWZbhSDcHJ?=
 =?iso-8859-1?Q?mSLMmqnHdfkiIRunmqm+Er2dKbyWGicCuJE8IXq7NFsUCfR2U8KtT15PmH?=
 =?iso-8859-1?Q?OVJwtQIofd+3ptqDgVBGpHuBJgX+wpnoxevSm6fEyYhD8bzKZ3LKdOIRq5?=
 =?iso-8859-1?Q?PoUnv88OVSzxffUC4G1yynTxzluBhrLe/+MB7MPekGldZlS6XeLnQlsx30?=
 =?iso-8859-1?Q?l/dYddQnd4zz320InH8gTARt7eE5KaCgugLMtnjvp/KswIep7A8D0kkYL7?=
 =?iso-8859-1?Q?h3J44KbxsxQn0riFdGl5UY8kzJeleiyB+KYYiQiFiz4mc2kEOcIw7SNs1q?=
 =?iso-8859-1?Q?qNkDxn4sPY0yG2VPztMSmCZLVPBy6UtNcyt23VyptFoVFl+c10sfOC0Gab?=
 =?iso-8859-1?Q?kKXj06x10jRpZCGQNbRwfKK56thwAnQL0u62MxvMtT3V/9M2stnd7W9e7Q?=
 =?iso-8859-1?Q?+DDSW5n97LXBs7UknT0mB6vMm40VOELIr42uvi7i/nVGqOaZMQFNo0/HkJ?=
 =?iso-8859-1?Q?l7j6Kg8vmW1KkMzv7X7lq8YHkConVPXPgE8Dkz7O5YS+c9Lgypmb2k5q7n?=
 =?iso-8859-1?Q?7ewrUVpCER5HxEAhVdB6gZ6FEr5cFUlgsaBIVS8uQ6Z3AiAz5caj+LPu/K?=
 =?iso-8859-1?Q?q1F+M5+6d9IgnimWfJUxqx85rkAehTuPkp0aidb2HL0O/z3fKSn3vOkInQ?=
 =?iso-8859-1?Q?R16cFPh5nNlhTyS2xNOVJc+eCB+84AR4fV?=
Content-Type: text/plain; charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5276.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-Network-Message-Id: a9fcaac2-0565-4eee-2c8f-08db01048e11
X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Jan 2023 07:52:07.7731
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: jUEp+BLlAqUhMJYPDANXHvsej+B0ROFmJ3ay7Bcg80TtUjM0/M2OZO21KjU2GXmn2j1Pnjpd+TCy/Y3LbK9TAw==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR11MB5677
X-OriginatorOrg: intel.com
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

> From: Bjorn Helgaas <helgaas@kernel.org>
> Sent: Saturday, January 28, 2023 1:31 AM
>=20
> On Sat, Jan 14, 2023 at 03:34:20PM +0800, Lu Baolu wrote:
>=20
> > @@ -353,12 +353,15 @@ void pci_pasid_init(struct pci_dev *pdev)
> >   * pci_enable_pasid - Enable the PASID capability
> >   * @pdev: PCI device structure
> >   * @features: Features to enable
> > + * @flags: device-specific flags
> > + *   - PCI_PASID_XLATED_REQ_ONLY: The PCI device always use translated
> type
> > + *                                for all PASID memory requests.
>=20
> s/use/uses/
>=20
> I guess PCI_PASID_XLATED_REQ_ONLY is something only the driver knows,
> right?  We can't deduce from architected config space that the device

Yes

> will produce PASID prefixes for every Memory Request, can we?
>=20

No, we can't. PASID cap only indicates that the device is capable of
using PASID prefix, not a mandatory requirement on every memory
request.

Similar case is PRI. Having PRI enabled only means the device is
capable of handling I/O page faults, not the indicator that it can
100% tolerate fault in every memory access. That is the main reason
why vfio/iommufd can't simply skip pinning guest memory when
seeing PRI enabled (well, though PRI is not supported yet). It has to
be opted-in via a driver specific way e.g. a vfio variant driver.

Thanks
Kevin