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Sun, 29 Jan 2023 16:57:28 -0800 From: Shanker Donthineni To: Thomas Gleixner , Marc Zyngier , Michael Walle CC: Sebastian Andrzej Siewior , Hans de Goede , Wolfram Sang , Shanker Donthineni , Subject: [PATCH 3/5] genirq: Introduce two helper functions Date: Sun, 29 Jan 2023 18:57:23 -0600 Message-ID: <20230130005725.3517597-4-sdonthineni@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230130005725.3517597-1-sdonthineni@nvidia.com> References: <20230130005725.3517597-1-sdonthineni@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000B8EF:EE_|BL0PR12MB4995:EE_ X-MS-Office365-Filtering-Correlation-Id: 6c8611bb-fcc8-45aa-c0ce-08db025cfb01 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: vkh4scsXdwc2BT2zNRzAkk92boWbCVSLtmF5keWhXC4OdjUbOclouKU1F3iqTsGpI3ZazDh8ymxmbY9EnXB4p7X6Sl0V4txb1tjBqow0bCen7o4TdOqoEbMeW6weu3rl3A8nWzXauBnTLfVNfO9DKim3c3oodYMc32g1yYEwJQPUiWerRT2PNwwiKMb0mmKcPkUIGa29nMo8I1WvyUa5sVHUw+ZAyVn3IxgpkcXFHXKszXXZtK6d8Es1n2GGN/Ie6TtozJmyx2Wm+kkGvau3oq1IhagrLqhLWeVpcEPPeJrB4Auy8FviXFR8sNFOZ6Z8GNdQ8hbdivNU77YL9WgEkb0WRZQQs3JWmBb8zypeRGtUZd6ghv6DCCA3I3c3I2RerKCWlV3DkQnz5HwYfpAzqPcpmor0H0Rq4+CgX08Ts21kNr9iObMdA4sgD0Siwq0rJY9u+N8zV3uGwNMEsfdeURPg9VB1jjDjMckfpqNSdg2bz5BBqPRuYEsGkhH+PfVJAEKvmzTHip9dOckB6XLmhpbds1h1ZGrhPsprwV40SWhASQTbkRQyGBz4W8udQnffYUaVtqhMtiYeC2KJf4gBnbkGSFr3rkvC8EwTdrV8XTAhy6j3482ydUzQIt2iFS6XO7qZaRLRVlOz7nY6Wq1QC8a8jOoMnwdt0q77QjYHoa0= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(396003)(39850400004)(376002)(346002)(136003)(451199018)(46966006)(36840700001)(83380400001)(2616005)(86362001)(47076005)(426003)(336012)(7636003)(82740400003)(82310400005)(356005)(36860700001)(2906002)(7696005)(36756003)(1076003)(186003)(26005)(478600001)(40480700001)(6666004)(8676002)(8936002)(4326008)(41300700001)(70586007)(70206006)(54906003)(5660300002)(110136005)(316002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jan 2023 00:57:37.3249 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6c8611bb-fcc8-45aa-c0ce-08db025cfb01 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000B8EF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR12MB4995 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce helper functions irq_find_free_area() and irq_find_next_irq(). The first function is used to locate available free space for a new IRQ, and the second one is used to find the next valid IRQ. These helper functions will be later modified to utilize the Maple data structure in a later patch. Additionally, in order to align the moving to the new data structure, the IRQ_BITMAP_BITS is renamed to MAX_SPARSE_IRQS. Signed-off-by: Shanker Donthineni --- kernel/irq/internals.h | 4 ++-- kernel/irq/irqdesc.c | 28 +++++++++++++++++++--------- 2 files changed, 21 insertions(+), 11 deletions(-) diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index 2fd17057ed4b..5d741b0e7d5e 100644 --- a/kernel/irq/internals.h +++ b/kernel/irq/internals.h @@ -12,9 +12,9 @@ #include #ifdef CONFIG_SPARSE_IRQ -# define IRQ_BITMAP_BITS (NR_IRQS + 8196) +# define MAX_SPARSE_IRQS (NR_IRQS + 8196) #else -# define IRQ_BITMAP_BITS NR_IRQS +# define MAX_SPARSE_IRQS NR_IRQS #endif #define istate core_internal_state__do_not_mess_with_it diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c index a4911f7ebb07..aacfb4826c5e 100644 --- a/kernel/irq/irqdesc.c +++ b/kernel/irq/irqdesc.c @@ -131,7 +131,18 @@ int nr_irqs = NR_IRQS; EXPORT_SYMBOL_GPL(nr_irqs); static DEFINE_MUTEX(sparse_irq_lock); -static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS); +static DECLARE_BITMAP(allocated_irqs, MAX_SPARSE_IRQS); + +static int irq_find_free_area(unsigned int from, unsigned int cnt) +{ + return bitmap_find_next_zero_area(allocated_irqs, MAX_SPARSE_IRQS, + from, cnt, 0); +} + +static unsigned int irq_find_next_irq(unsigned int offset) +{ + return find_next_bit(allocated_irqs, nr_irqs, offset); +} #ifdef CONFIG_SPARSE_IRQ @@ -519,7 +530,7 @@ static int alloc_descs(unsigned int start, unsigned int cnt, int node, static int irq_expand_nr_irqs(unsigned int nr) { - if (nr > IRQ_BITMAP_BITS) + if (nr > MAX_SPARSE_IRQS) return -ENOMEM; nr_irqs = nr; return 0; @@ -537,11 +548,11 @@ int __init early_irq_init(void) printk(KERN_INFO "NR_IRQS: %d, nr_irqs: %d, preallocated irqs: %d\n", NR_IRQS, nr_irqs, initcnt); - if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS)) - nr_irqs = IRQ_BITMAP_BITS; + if (WARN_ON(nr_irqs > MAX_SPARSE_IRQS)) + nr_irqs = MAX_SPARSE_IRQS; - if (WARN_ON(initcnt > IRQ_BITMAP_BITS)) - initcnt = IRQ_BITMAP_BITS; + if (WARN_ON(initcnt > MAX_SPARSE_IRQS)) + initcnt = MAX_SPARSE_IRQS; if (initcnt > nr_irqs) nr_irqs = initcnt; @@ -813,8 +824,7 @@ __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node, mutex_lock(&sparse_irq_lock); - start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS, - from, cnt, 0); + start = irq_find_free_area(from, cnt); ret = -EEXIST; if (irq >=0 && start != irq) goto unlock; @@ -839,7 +849,7 @@ EXPORT_SYMBOL_GPL(__irq_alloc_descs); */ unsigned int irq_get_next_irq(unsigned int offset) { - return find_next_bit(allocated_irqs, nr_irqs, offset); + return irq_find_next_irq(offset); } struct irq_desc * -- 2.25.1