Message-ID: <fe54244c-3d05-2d70-6bdb-f4cde9448ae5@ti.com>
Date:   Mon, 30 Jan 2023 12:32:53 +0530
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Subject: Re: [EXTERNAL] Re: [PATCH v3 1/2] dt-bindings: net: Add ICSSG
 Ethernet Driver bindings
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To:     Roger Quadros <rogerq@kernel.org>, Andrew Lunn <andrew@lunn.ch>,
        "Md Danish Anwar" <danishanwar@ti.com>
CC:     "Andrew F. Davis" <afd@ti.com>, Tero Kristo <t-kristo@ti.com>,
        Suman Anna <s-anna@ti.com>, YueHaibing <yuehaibing@huawei.com>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        "Jakub Kicinski" <kuba@kernel.org>,
        Eric Dumazet <edumazet@google.com>,
        "David S. Miller" <davem@davemloft.net>, <nm@ti.com>,
        <ssantosh@kernel.org>, <srk@ti.com>,
        <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <netdev@vger.kernel.org>, <linux-omap@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>
References: <20221223110930.1337536-1-danishanwar@ti.com>
 <20221223110930.1337536-2-danishanwar@ti.com> <Y6W7FNzJEHYt6URg@lunn.ch>
 <620ce8e6-2b40-1322-364a-0099a6e2af26@kernel.org> <Y7Mjx8ZEVEcU2mK8@lunn.ch>
 <b55dec4b-4fd5-71fa-4073-b5793cafdee7@kernel.org>
From:   Md Danish Anwar <a0501179@ti.com>
Organization: Texas Instruments
In-Reply-To: <b55dec4b-4fd5-71fa-4073-b5793cafdee7@kernel.org>
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Hi Roger,

On 05/01/23 17:03, Roger Quadros wrote:
> On 02/01/2023 20:34, Andrew Lunn wrote:
>> On Mon, Jan 02, 2023 at 03:04:19PM +0200, Roger Quadros wrote:
>>>
>>>
>>> On 23/12/2022 16:28, Andrew Lunn wrote:
>>>>> +        ethernet-ports {
>>>>> +            #address-cells = <1>;
>>>>> +            #size-cells = <0>;
>>>>> +            pruss2_emac0: port@0 {
>>>>> +                reg = <0>;
>>>>> +                phy-handle = <&pruss2_eth0_phy>;
>>>>> +                phy-mode = "rgmii-rxid";
>>>>
>>>> That is unusual. Where are the TX delays coming from?
>>>
>>> >From the below property
>>>
>>> +                ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
>>>
>>> The TX delay can be enabled/disabled from within the ICSSG block.
>>>
>>> If this property exists and PHY mode is neither PHY_INTERFACE_MODE_RGMII_ID
>>> nor PHY_INTERFACE_MODE_RGMII_TXID then the internal delay is enabled.
>>>
>>> This logic is in prueth_config_rgmiidelay() function in the introduced driver.
>>
>> What nearly every other MAC driver does is pass the phy-mode to the
>> PHY and lets the PHY add the delays. I would recommend you do that,
>> rather than be special and different.
> 
> 
> If I remember right we couldn't disable MAC TX delay on some earlier silicon
> so had to take this route. I don't remember why we couldn't disable it though.
> 
> In more recent Silicon Manuals I do see that MAC TX delay can be enabled/disabled.
> If this really is the case then we should change to
> 
>  phy-mode = "rgmii-id";
> 
> And let PHY handle the TX+RX delays.
> 
> Danish,
> could you please make the change and test if it works on current silicon?
> 

I changed the phy-mode to "rgmii-id" instead of "rgmii-rxid". I did the testing
on current silicon (AM654x SR 2.0) and it is working fine.

> cheers,
> -roger

Thanks and Regards,
Danish.