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Subject: Re: [PATCH 0/1] net: stmmac: do not stop RX_CLK in Rx LPI state for
 qcs404 SoC
From:   patchwork-bot+netdevbpf@kernel.org
Message-Id: <167506381644.14069.1519780033829172123.git-patchwork-notify@kernel.org>
Date:   Mon, 30 Jan 2023 07:30:16 +0000
References: <20230126213539.166298-1-andrey.konovalov@linaro.org>
In-Reply-To: <20230126213539.166298-1-andrey.konovalov@linaro.org>
To:     Andrey Konovalov <andrey.konovalov@linaro.org>
Cc:     vkoul@kernel.org, bhupesh.sharma@linaro.org, davem@davemloft.net,
        edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
        andrew@lunn.ch, robh@kernel.org, alexandre.torgue@foss.st.com,
        peppe.cavallaro@st.com, joabreu@synopsys.com,
        mcoquelin.stm32@gmail.com, linux-kernel@vger.kernel.org,
        netdev@vger.kernel.org
Precedence: bulk

Hello:

This patch was applied to netdev/net.git (master)
by David S. Miller <davem@davemloft.net>:

On Fri, 27 Jan 2023 00:35:38 +0300 you wrote:
> This is a different, for one SoC only solution to the issue described below
> vs a generic one submitted earlier [1].
> 
> On my qcs404 based board the ethernet MAC has issues with handling
> Rx LPI exit / Rx LPI entry interrupts.
> 
> When in LPI mode the "refresh transmission" is received, the driver may
> see both "Rx LPI exit", and "Rx LPI entry" bits set in the single read from
> GMAC4_LPI_CTRL_STATUS register (vs "Rx LPI exit" first, and "Rx LPI entry"
> then). In this case an interrupt storm happens: the LPI interrupt is
> triggered every few microseconds - with all the status bits in the
> GMAC4_LPI_CTRL_STATUS register being read as zeros. This interrupt storm
> continues until a normal non-zero status is read from GMAC4_LPI_CTRL_STATUS
> register (single "Rx LPI exit", or "Tx LPI exit").
> 
> [...]

Here is the summary with links:
  - [1/1] net: stmmac: do not stop RX_CLK in Rx LPI state for qcs404 SoC
    https://git.kernel.org/netdev/net/c/54aa39a513db

You are awesome, thank you!
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