Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20560C54EAA for ; Mon, 30 Jan 2023 14:21:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237731AbjA3OVn (ORCPT ); Mon, 30 Jan 2023 09:21:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60600 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237639AbjA3OVX (ORCPT ); Mon, 30 Jan 2023 09:21:23 -0500 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D881840BD1 for ; Mon, 30 Jan 2023 06:20:15 -0800 (PST) Received: by mail-wm1-x32a.google.com with SMTP id iv8-20020a05600c548800b003db04a0a46bso8875155wmb.0 for ; Mon, 30 Jan 2023 06:20:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=QVfyUaMlKe2XgKvP+3UZFMNGgzOkxpuMQuoaVQh0BKc=; b=AU5OTDUQfdokXPeFU5yQryz/q9qCxaUN91+qIhqfKpwMtoooFYxLZ+jyVqOWOOnFcm R9juG1J/K6NASljEygwMQHYkM9UwC2lChPae8ue/Z2qbu4y3wh3U4CIHGVkE4G9yWZe3 w8b+MFuKkD0IIxf3m1WUq4rMdbLFawaBlmb0DBBOQbsF4cZ+epAFbH8OTYKoJEt6FRIU hhMUwxrm1K0edMp/noTFix8XechTBHb2fKw6XJnYPbuhlpBUNZW1DWBSLzy/8CpWjDz4 RtQ8I4CGdwRZ1nODOxCei15r1vrC/tWP/Bvae6aII0GLmVkACD41/kg0eHHRFqwd7Epi Y5Vg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=QVfyUaMlKe2XgKvP+3UZFMNGgzOkxpuMQuoaVQh0BKc=; b=tMgLQ5urpIb4EenrFZhjlyVHAKDy1gph9wsYwOYP21X7bq0Iq+GIkq9FUXYoJgNfZx t6PwSDqaA27OM/rvPtTLIjrR5J0dW7Y2+Maq7iZycm8lUJApx9+5aVyWL435vaqMymWz YDqI4qzWbdY/EWTzwvjyLGMmoeAt58UhrJCllNtT4Iy6uKMr9nhSe5bGYK4DFgIag/wJ LzVS9W3z0ykIM4NyjEwRYnk8r8su3Iew9+lJvgRN2ITjX6sdTeckxu81qLHLsxjxM1vZ PjNc1EB1uX6t798UwU5o/FSVWPYg3gFDdm7kUPvcI1El28p1bWkb//qwqYcucGIYBTdn dopw== X-Gm-Message-State: AO0yUKWxeiiDkNGrdRInJmSjhOOjyXvGOYdOeYiojI5du2EWLoUzU1lN OHaLZci7xoglGfO72vxClM5K7g== X-Google-Smtp-Source: AK7set/pqvBd/T/fnKgqYnfdEL/4TEGOcLzq7bpTeWO1f5GtFkVADlDjXe6AYRSdPNLc0ue8bBGsTw== X-Received: by 2002:a05:600c:54e5:b0:3dc:4f2c:c856 with SMTP id jb5-20020a05600c54e500b003dc4f2cc856mr7773946wmb.32.1675088374692; Mon, 30 Jan 2023 06:19:34 -0800 (PST) Received: from localhost (2001-1ae9-1c2-4c00-20f-c6b4-1e57-7965.ip6.tmcz.cz. [2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id e5-20020a05600c254500b003dc47fb33dasm8355006wma.18.2023.01.30.06.19.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 06:19:34 -0800 (PST) Date: Mon, 30 Jan 2023 15:19:33 +0100 From: Andrew Jones To: Rob Herring Cc: Alexandre Ghiti , Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Frank Rowand , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org Subject: Re: [PATCH v4] riscv: Use PUD/P4D/PGD pages for the linear mapping Message-ID: <20230130141933.wuikrruh2svkcfv4@orel> References: <20230123112803.817534-1-alexghiti@rivosinc.com> <20230123142554.f22ajf6upfk2ybxk@orel> <20230125104102.2thvourt3lx2p36a@orel> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 30, 2023 at 07:48:04AM -0600, Rob Herring wrote: > On Wed, Jan 25, 2023 at 6:13 AM Alexandre Ghiti wrote: > > > > On Wed, Jan 25, 2023 at 11:41 AM Andrew Jones wrote: > > > > > > On Mon, Jan 23, 2023 at 03:25:54PM +0100, Andrew Jones wrote: > > > > On Mon, Jan 23, 2023 at 12:28:02PM +0100, Alexandre Ghiti wrote: > > > > > During the early page table creation, we used to set the mapping for > > > > > PAGE_OFFSET to the kernel load address: but the kernel load address is > > > > > always offseted by PMD_SIZE which makes it impossible to use PUD/P4D/PGD > > > > > pages as this physical address is not aligned on PUD/P4D/PGD size (whereas > > > > > PAGE_OFFSET is). > > [...] > > > > > > diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c > > > > > index f08b25195ae7..58107bd56f8f 100644 > > > > > --- a/drivers/of/fdt.c > > > > > +++ b/drivers/of/fdt.c > > > > > @@ -891,12 +891,13 @@ const void * __init of_flat_dt_match_machine(const void *default_match, > > > > > static void __early_init_dt_declare_initrd(unsigned long start, > > > > > unsigned long end) > > > > > { > > > > > - /* ARM64 would cause a BUG to occur here when CONFIG_DEBUG_VM is > > > > > - * enabled since __va() is called too early. ARM64 does make use > > > > > - * of phys_initrd_start/phys_initrd_size so we can skip this > > > > > - * conversion. > > > > > + /* > > > > > + * __va() is not yet available this early on some platforms. In that > > > > > + * case, the platform uses phys_initrd_start/phys_initrd_size instead > > > > > + * and does the VA conversion itself. > > > > > */ > > > > > - if (!IS_ENABLED(CONFIG_ARM64)) { > > > > > + if (!IS_ENABLED(CONFIG_ARM64) && > > > > > + !(IS_ENABLED(CONFIG_RISCV) && IS_ENABLED(CONFIG_64BIT))) { > > > > > > > > There are now two architectures, so maybe it's time for a new config > > > > symbol which would be selected by arm64 and riscv64 and then used here, > > > > e.g. > > > > > > > > if (!IS_ENABLED(CONFIG_NO_EARLY_LINEAR_MAP)) { > > > > > > I see v5 left this as it was. Any comment on this suggestion? > > > > Introducing a config for this only use case sounds excessive to me, > > but I'll let Rob decide what he wants to see here. > > Agreed. Can we just keep it as is here. > > > > > > initrd_start = (unsigned long)__va(start); > > > > > initrd_end = (unsigned long)__va(end); > > I think long term, we should just get rid of needing to do this part > in the DT code and let the initrd code do this. initrd code provides reserve_initrd_mem() for this and riscv calls it later on. afaict, this early setting in OF code is a convenience which architectures could be taught not to depend on, and then it could be removed. But, until then, some architectures will need to avoid it. As I commented downthread, I also don't want to go with a config anymore, but it'd be nice to keep arch-specifics out of here, so I've posted a patch changing __early_init_dt_declare_initrd to be a weak function. Thanks, drew