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From:   Nava kishore Manne <nava.kishore.manne@amd.com>
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Subject: [PATCH v5 0/2]Adds status interface for zynqmp-fpga
Date:   Tue, 31 Jan 2023 15:18:08 +0530
Message-ID: <20230131094810.1945541-1-nava.kishore.manne@amd.com>
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Adds status interface for zynqmp-fpga, It's a read only interface
which allows the user to get the Programmable Logic(PL) status.
 -Device Initialization error.
 -Device internal signal error.
 -All I/Os are placed in High-Z state.
 -Device start-up sequence error.
 -Firmware error.

For more details refer the ug570.
https://docs.xilinx.com/v/u/en-US/ug570-ultrascale-configuration

Nava kishore Manne (2):
  firmware: xilinx: Add pm api function for PL config reg readback
  fpga: zynqmp-fpga: Adds status interface

 .../ABI/testing/sysfs-driver-zynqmp-fpga      | 18 ++++
 drivers/firmware/xilinx/zynqmp.c              | 33 +++++++
 drivers/fpga/zynqmp-fpga.c                    | 87 +++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h          | 11 +++
 4 files changed, 149 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-zynqmp-fpga

-- 
2.25.1